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US 4,751,442 AGranted
Servomotor drive control system
AssigneeFanuc Corporation
InventorMitsuo Kurakake
Life of this patent
Estimating the term…
Abstract
A servomotor drive control system in which current control of a servomotor is performed by a microprocessor on the basis of a current feedback signal of the servomotor an interrupt generating circuit interrupts the microprocessor a circuit for storing an interrupt period and a current command applied to the servomotor are also included in the system. The arrangement is such that an interrupt period is set in dependence upon the rating of the servomotor being driven and controlled.
Claims10
A servomotor drive control system, comprising:
- a servomotor;
- a main CPU, coupled to said servomotor, for performing input data and sequence data processing of said servomotor;
- a servo-control CPU, coupled to said main CPU, for controlling current, velocity and position of said servomotor;
- interrupt generating means, connected to said servo-control CPU, for generating an interrupt command at an interrupt period set in dependence upon a rating of said servomotor;
- and
- means, connected to said interrupt generating means, for storing said interrupt command and a current command applied to said servomotor.
3 more elements
A servomotor drive control system including a servomotor comprising:
- a main CPU, coupled to the servomotor, for performing a programmed numerical control operation including controlling the servomotor, and receiving input data to operate the servomotor, processing the received input date for performing numerical data control, and issuing an operating command to the servomotor;
- a servo-control CPU, connected to said main CPU and said servomotor, for receiving the operating command from said main CPU and for controlling a current supplied to the servomotor, rotational speed and position of the servomotor in accordance with the operating command;
- a shared random access memory (RAM), connected between said main CPU and said servo-control CPU, for temporarily storing data transmitted between said main CPU and said servo-control CPU;
- a servo-amplifier, connected between said shared RAM and the servomotor, for driving the servomotor;
- a pulse width modulated (PWM) command output circuit connected between said servo-control CPU and said servo-amplifier, for applying a pulse width modulated signal to said servo-amplifier in response to a command from said servo-control CPU;
- interrupt generating means, connected to said servo-control CPU, for generating an interrupt command and an interrupt period set in dependence upon a rating of the servomotor;
- and
- an oscillator, connected to said interrupt generator means, for generating an interrupt command period signal to said servo-control CPU, said interrupt command period signal having a variable period.
5 more elements
Dependencies are inferred from the claim text.