High density multi-chip interconnection and cooling package

An interconnect assembly for providing external power and signal connections to an array of integrated circuit chips arranged to provide a large number of, and a high density of, terminals, comprising:

• a plate having apertures therein for mounting said chips in a substantially planar array;
• a bus plate assembly comprising at least two substantially planar bus plates assembled in mutually insulated fashion along two major faces with the first and second outer major faces, and having apertures corresponding to the locations of the integrated circuit chips;
• an external assembly comprising an insulated mounting plate and a plurality of terminals extending through the insulated mounting plate for providing electrical connection to external signal circuits;
• a housing for mounting the bus plate between the chip mounting plate and the connector assembly with the bus plate apertures aligned with the chip mounting plate apertures and with the first major surface of the bus plate assembly facing the chip assembly and the second major surface of the bus plate assembly facing the connector assembly;
• power supply pins mounted about the periphery of the housing for providing electrical connection to at least first and second power supply levels;
• at least one chip connector subassembly, each said subassembly being sized and adapted for mounting within an aperture of the bus plate assembly, and comprising:
• planar insulator plate means supporting an array of flexible insulator springs on each major face thereof corresponding to the chip terminal pattern;
• a plurality of individual connectors, each providing a feed-through connection through the planar insulated plate to selectively connect chip power and signal terminals on said first side of the bus plate assembly to associated connector assembly terminals on said second major surface of the bus plate assembly and to associated power supply terminals, the individual feed-through connectors being supported at said first and second major surfaces by an associated insulator spring for decreasing the transmission of stress between the feedthrough connectors and the chip terminals and between the feedthrough connectors and the connector assembly terminals as the result of relative movement between the chip plate and the bus plate assembly and the connector assembly;
• and a metallization pattern formed on said first and second major surfaces of the planar insulator plate selectively connected to a first and a second plurality of the feed-through connectors on either major surface corresponding to the two power supply voltage levels;
• and
• at least a pair of patterned flexible conductor plates each overlying a separate one of said first and second bus plate surfaces and each being connected to one of said metallization patterns and associated power supply pins for selectively interconnecting the first and second power supply voltage levels to the associated first and second plurality of feed-through connectors.

An interconnect assembly for connecting the terminals of an integrated circuit to external circuits, comprising:

• a base having top and bottom surfaces and having conductive through-holes extending between the surfaces;
• an array of terminals mounted on the top surface and to the through-holes and having a generally arcuate configuration extending upward from the base toward and across corresponding integrated circuit chip terminals;
• an array of resilient insulator members mounted between the base and the associated arcuate terminals for biasing the terminals against the associated integrated circuit chip terminals;
• and
• an array of terminals on the bottom side of the base mounted electrically in common with associated through-holes for contacting the integrated circuit chip terminals to external circuits.

An interconnect assembly for separately connecting the power and signal terminals of an integrated circuit chip to external power and signal terminals comprising:

• frame means adapted for supporting at least one integrated circuit chip and supporting a peripheral array of terminals and a separate base array of terminals, both being adapted for connection to external circuits;
• an interconnect subassembly mounted between the chip position and the base and peripheral arrays of terminals and comprising:
• a base having conductive vias extending therethrough between first and second opposite sides;
• a first and second array of flexible terminals formed on the opposite sides and connected to associated vias for selectively interconnecting chip signal terminals to the base array of terminals;
• and
• flexible connector means adapted for interconnecting the peripheral array of terminals to selected ones of the flexible terminals to connect the chip power terminals to the peripheral terminals.

A module for cooling an array of at least one semiconductor body, comprising:

• an enclosed chamber module having a flexible membrane therein mounting an array of heat sink bodies;
• each heat sink body comprising a body having a surface and a fluid cooling passageway immediately adjacent the surface;
• groups of the heat sink bodies being mounted end-to-end by the flexible membrane to provide a continuous path therethrough, and the heat sink bodies being mounted by the flexible membrane collectively in a generally planar array and individually in an alterable orientation permitting adaptation of the heat sink surface to a corresponding underlying semiconductor body surface;
• spring means for biasing the individual heat sink bodies against the semiconductor body surface, whereby the flexible membrane conforms the orientation of the heat sink surface to the orientation of the corresponding semiconductor body surface;
• and, fluid inlet and outlet means for directing cooling fluid through the groups of heat sink bodies.

A module for cooling an array of at least one semiconductor body, comprising:

• an enclosed chamber module having a flexible membrane therein mounting an array of heat sink bodies;
• each heat sink body comprising a body having a surface and a fluid cooling passageway immediately adjacent the surface;
• means forming an inner chamber structure having inlet and outlet apertures for separately directing coolant fluid into and out of the individual heat sink bodies;
• the heat sink bodies being mounted by the flexible membrane collectively in a generally planar array and individually in an alterable orientation permitting adaptation of the heat sink surface to a corresponding underlying semiconductor body surface;
• spring means for biasing the individual heat sink bodies against the semiconductor body surface, whereby the flexible membrane conforms the orientation of the heat sink surface to the orientation of the corresponding semiconductor body surface;
• and, fluid inlet and outlet means for directing cooling fluid into and out of the inner chamber structure.