Method of making a self-aligned MESFET using a substitutional gate with side walls

A process for producing a semiconductor device comprising:

• a. depositing a layer of silicon dioxide to a thickness of about 4000 to 15,000 angstroms onto a supporting gallium arsenide substrate having a surface and including a channel region below the surface which contains a carrier concentration of an n-type conductivity;
• b. removing portions of the silicon dioxide to form a substitutional gate on the surface;
• c. forming sidewalls of a dielectric material selected from the group consisting of silicon dioxide, silicon nitride, polymers and photoresists bounding the substitutional gate by depositing a layer of silicon nitride to a thickness of about 2000 angstroms and removing selected portions by etching to form sidewalls sufficiently thick to perform ion implantation blockage;
• d. reducing the thickness of the sidewalls to a desired thickness;
• e. ion implanting an n+ type dopant into the unmasked region of the substrate;
• f. removing the sidewalls from the substitutional gate by preferentially etching the sidewalls without etching the substitutional gate;
• g. capless annealing for about two minutes under arsine overpressure at about 800.degree. to 900.degree. Celsius to prevent arsenic evaporation;
• h. applying a planarizing polymeric material over the substrate surface and the substitutional gate and thereafter etching back to expose the top of the substitutional gate;
• i. removing the substitutional gate by applying buffered hydrofluoric acid to the substitutional gate;
• j. depositing gate metal and first and second ohmic contacts in correct positional relation to one another on the substrate;
• and
• k. depositing metallic interconnects in electrical communication with the ohmic contacts to produce a semiconductor device.