US 4,743,862 AGranted

JFET current mirror and voltage level shifting apparatus

AssigneeAnadigics, Inc.

InventorNorman R. Scheinberg

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Abstract

A JFET current mirror is employed in the voltage level shifting section of an operational amplifier. The JFET current mirror includes a first and second JFET coupled at their gates for conducting current I1 and I2 respectively. The gate of a third JFET is connected to the drain of the first JFET and the source of the third JFET is connected by a plurality of diodes to the gate of the first JFET. Current flowing through the diodes produces a voltage drop across the diodes sufficient to bias the first JFET into saturation so that I2 will track I1. A fixed resistance R in the path of I2 produces a predetermined voltage level shift provided that I1 is constant. Therefore, a voltage applied to one terminal of R is level shifted by a predetermined voltage with respect to the other terminal of R. The voltage shifted output is then coupled to an internal amplifier section and the output buffer section of the operational amplifier.

Claims12

Dependent claims

A voltage level shifter apparatus including a current mirror connected across a power supply having a first and a second terminal and further including a plurality of JFETs each including a gate, source and drain, said voltage level shifter apparatus comprising:

first current path means for conducting a current I1, said first current path means including a first JFET;
second current path means for conducting a current I2, said second current path means including a second JFET whose gate is connected to the gate of said first JFET;
biasing means for biasing said first JFET into saturation and including a third JFET and a diode means comprising a first and second diode means connected in series and wherein the drain of said first JFET is connected to the gate of said third JFET and the source of said third JFET is connected through said first and second diode means to the gate of said first JFET;
third diode means connected between the source of said first JFET and said second terminal of said power supply;
fourth diode means connected between the source of said second JFET and said second terminal of said power supply;
first resistor means connected in said first current path means between the drain of said first JFET and said first terminal of said power supply;
second resistor means connected in said second current path means between the drain of said second JFET and said first terminal of said power supply;
variable voltage input means connected between said second resistor means and said first terminal of said power supply;
and,
output circuit terminal means connected to the junction between the drain of said second JFET and said second resistor means,
wherein when said first JFET is biased into saturation said second current I2 will be substantially equal to said first current I1 and wherein a variable voltage applied to said variable voltage input means is level shifted by the voltage drop across said second resistor means.

8 more elements

A voltage level shifer apparatus including a current mirror connected across a power supply having a first and second terminal and a plurality of JFETs each including a gate, source and drain, said voltage level shifter apparatus comprising:

first current path means for conducting a current I1, said first current path means including a first JFET;
second current path means for conducting a current I2, said second current path means including a second JFET having its gate connected to the gate of said first JFET;
biasing means for biasing said first JFET into saturation and including a third JFET connected in cascode with said first JFET such that the drain of said first JFET is connected to the source of said third JFET and the drain of said third JFET is connected to the first terminal of said power supply, said biasing means further including first and second diode means connected between the gate of said third JFET and the gate of said first JFET;
a first JFET having its source connected in cascode to the drain of said second JFET, said drain of said fourth JFET being connected to said first terminal of said power supply and said gate of said fourth JFET being connected to the gate of said third JFET;
a fifth JFET having its gate connected to the drain of said third JFET, said drain of said fifth JFET being connected to said first terminal of said power supply;
third diode means connected between the source of said fifth JFET and the gate of said third JFET;
fourth diode means connected between the source of said first JFET and said second terminal of said power supply;
fifth diode means connected between the source of said second JFET and the second terminal of said power supply;
a sixth JFET having its drain connected to the gate of said first JFET and its gate and source connected together to said second terminal of said power supply;
a seventh JFET having its gate connected to the drain of said fourth JFET;
sixth diode means having one end thereof connected to the source of said seventh JFET;
and,
an eighth JFET having its drain connected to the other end of said sixth diode means and having its gate and source connected together to said second terminal of said power supply,
wherein when said first JFET is biased into saturation said second current I2 will be substantially equal to said first current I1 and the output of said apparatus is taken across the drain and source of said eighth JFET.

11 more elements

A voltage level shifer apparatus including a current mirror connected across the power supply having a first and second terminal and a plurality of JFETs each including a gate, source and drain, said voltage level shifter apparatus comprising:

first current path means for conducting a current I1, said first current path means including a first JFET whose source is connected to said second terminal;
second current path means for conducting a current I2, said second current path means including a second JFET whose gate is connected to the gate of said first JFET and whose source is also connected to said second terminal;
biasing means for biasing said first JFET into saturation, said biasing means including a third JFET and a first diode means, wherein the drain of said first JFET is connected to the gate of said third JFET and the source of said third JFET is connected by said first diode means to the gate of said first JFET;
first resistor means connected in said first current path means between the drain of said first JFET and said first terminal of the power supply;
second resistor means connected in said second current path means between the drain of said second JFET and said first terminal of said power supply;
variable voltage input means connected between said second resistor means and said first terminal of said power supply;
output circuit terminal means connected to the junction between the drain of said second JFET and said second resistor means,
wherein when said first JFET is biased into saturation said second current I2 will be substantially equal to said first current I1 and wherein a variable voltage applied to said variable voltage input means is level shifted by the voltage drop across the second resistor means.

5 more elements

A voltage level shifer apparatus including a current mirror connected across a power supply having a first and second terminal and a plurallity of JFETs each having a gate, source and drain, said voltage level shifter apparatus comprising:

first current path means for conducting a current I1, said first current path means including a first JFET;
second current path means for conducting a current I2, said second current path means including a second JFET having its gate connected to the gate of said first JFET;
a third JFET connected in cascode with said first JFET such that the drain of said first JFET is connected to the source of said third JFET and the drain of said third JFET is connected to the first terminal of said power supply;
at least a first and second diode means connected between the gate of said third JFET and the gate of said first JFET;
a fourth JFET having its source connected in cascode to the drain of said second JFET, said drain of said fourth JFET being connected to said first terminal of said power supply and said gate of said fourth JFET being connected to the gate of said third JFET,
a fifth JFET having its gate connected to the drain of said third JFET, said drain of said fifth JFET being connected to the first terminal of said power supply;
third diode means connected between the source of said fifth JFET and the gate of said third JFET;
fourth diode means connected between the source of said first JFET and said second terminal of said power supply;
fifth diode means connected between the source of said second JFET and a second terminal of said power supply;
sixth JFET having its drain connected to the gate of said first JFET and its gate and source connected together to said second terminal of said power supply;
seventh JFET having its gate connected to the drain of said fourth JFET;
sixth diode means having one end thereof connected to the source of said seventh JFET;
and,
an eighth JFET having its drain connected to the other end of said sixth diode means and having its gate and source connected together to said second terminal of said power supply,
wherein the output of said apparatus is taken across the drain and source of said eighth JFET and when said first JFET is biased into saturation said second current I2 will be substantially equal to said first current I1.

12 more elements

Dependencies are inferred from the claim text.