Current-limiting thin film termination for capacitors

A process for providing end terminations on a multilayer capacitor chip to define a non-shorting capacitor, the chip containing first and second sets of conductive layers and alternating dielectric layers, with each of the layers of the first set having an edge exposed at one end of the chip and each of the layers of the second set having an edge exposed at the opposite end of the chip, the process comprising the steps of:

• (1) forming a first sputter-coated metallization film covering the opposite ends of the chip and extending between the opposite ends;
• (2) forming a second sputter-coated metallization film covering first film on the opposite ends of the chip and also extending between the opposite ends;
• (3) forming a passivation layer covering the second film on one end of the chip;
• (4) forming a third sputter-coated metallization film covering the passivation layer on the opposite ends of the chip and also extending between the opposite ends;
• (5) forming a fourth sputter-coated metallization film covering the third metallization film on the opposite ends of the chip and also extending between the opposite ends;
• and
• (6) removing the metallization films from the chip intermediate its ends sufficiently to eliminate every direct-current conductive path around the outside of the chip from one end to the other, leaving the metallization films on and surrounding each end thereof for electrical connection of the resulting capacitor to external electrical circuitry.

A process for providing end terminations on each of many multilayer capacitor chips so that each defines a non-shorting capacitor, the process comprising:

• (1) loading a plurality of multilayer capacitor chips to be terminated into an evacuable enclosure;
• (2) heating the chips;
• (3) rotating the enclosure to tumble the chips;
• (4) evacuating the enclosure to produce a vacuum suitable for sputtering;
• (5) introducing an inert gas into said enclosure;
• (6) sputtering a first metallic material while the chips are tumbling to form on each of the chips a first sputter-coated metallization film covering its entire exterior surface;
• (7) sputtering a second metallic material while the chips are tumbling to form on each of the chips a second sputter-coated metallization film over all of the first film;
• (8) applying a passivation layer at one end of each chip;
• (9) sputtering a third metallic material while the chips are tumbling to form on each of the chips a third sputter-coated metallization film over the passivation layer and the second film;
• (10) sputtering a fourth metallic material while the chips are tumbling to form a fourth sputter-coated film over all of the third film;
• and
• (11) removing the metallization films from each chip intermediate its ends sufficiently to eliminate every direct-current conductive path around the outside of the chip from one end to the other, leaving the metallization films on and surrounding each end thereof for electrical connection of the resulting capacitor to external electrical circuitry.