US 4,736,438 AGranted

Image processing device for the real-time processing and recognition of two-dimensional images, and an image processing system including at least two series-connected image processing devices of this kind

AssigneeU.S. Philips Corporation

InventorsEric H. J. Persoon, Hendrikus Daalder

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Abstract

An image processing device for two-dimensional raster images is described. The receiving means thereof are followed by a sub-sampling circuit (28) for increasing the pitch of the raster received in accordance with an adjustable scale. To the sub-sampling circuit there are connected a buffer (30, 32) and a correlation circuit (36, 38) for comparing a number of columns of pixels with a reference image. The comparison result is subjected to a logic operation. The device is suitable for modular use and may include a growth circuit for converting rasters portions onto one color or brightness when a predetermined minimum number of pixels therein contains the relevant color or brightness, respectively.

Claims14

Dependent claims

An image processing device for the real-time processing and recognition of an image consisting of a two-dimensional array of digitized pixels, said device including:

(a) receiving means (20, 22) for receiving the pixels in order to form therefrom a first bit stream in which each bit represents a fine-grained pixel;
(b) a sub-sampling circuit, which includes a control input, for forming a second bit stream having a secondary raster period and in which each bit represents a coarse-grained pixel, from the first bit stream;
(c) a buffer which is line-wise fed by the sub-sampling circuit in order to effect temporary storage of the second bit stream and to present the information from a column of pixels in parallel on an output;
(d) a correlation circuit which is fed by the buffer in order to compare the pixels of a number of successively received columns with corresponding reference pixels from a reference image,
(e) a masking circuit indicating each pixel-wise comparison as being relevant/irrelevant;
(f) clock means for controlling the sub-sampling circuit, the buffer, and the correlation circuit in mutual synchronism and for controlling the receiving means isochronously with respect thereto, wherein the improvement comprises:
(g) the sub-sampling circuit includes a control input, the sub-sampling circuit selectably adjusting the secondary raster period to different values between 1 and a maximum pitch-increasing factor, under the control of a pitch-increasing control signal, and
(h) a selection/processing circuit is connected to the output of the correlation circuit for selectively presenting respective categories of comparison results at a recognition output, under control of the clock means in synchronism with the sub-sampling circuit, the buffer and the correlation circuit, which recognition output is suitable for the connection of a further image processing device of this kind as well as for the supply of comparison results to a user device.

5 more elements

An image processing device for real-time processing and recognition of an image consisting of a two-dimensional array of digitized pixels, said device comprising:

a. means for receiving the image in order to form therefrom a first bit stream in which each bit represents a fine-grained pixel;
b. a sub-sampling circuit for forming a second bit stream from the first bit stream, the second bit stream having a secondary raster period, each bit of the second bit stream representing a coarse-grained pixel, the sub-sampling circuit having a control input coupled to receive a pitch-increasing control signal, the sub-sampling circuit selectably adjusting the secondary raster period to different values between 1 and a maximum pitch-increasing factor;
c. a buffer for temporarily storing the second bit stream, the buffer being fed line-wise by the sub-sampling circuit and having an output at which a column of pixels is provided in parallel;
d. a correlation circuit coupled to the output of the buffer for comparing successively received columns of pixels with corresponding reference pixels from a reference image;
e. a masking circuit for indicating whether each pixel-wise comparison made by the correlation circuit is relevant;
f. a selection/processing circuit, coupled to the output of the correlation circuit, for selectively presenting respective categories of comparison results at a recognition output, which recognition output is suitable for the connection of a further image processing device as well as for supplying comparison results to a user device;
and
g. clock means for synchronously controlling the sub-sampling circuit, the buffer, the correlation circuit, and the selection/processing circuit and for controlling the receiving means isochronously with respect thereto.

5 more elements

Dependencies are inferred from the claim text.