US 4,736,375 A · Apparatus for fast generation of large quantities of test data words in a test facility

Abstract

A test data generator and a test data converter are provided for generating test data words which are allocated to the terminal elements of a card module having electronic components. Dependent on a test program, the test data generator generates one or more test data vectors per test step to be executed. The test data converter generates the test data words from a test data vector or from further test information, and allocates individual bits of a test vector or of the test information to individual terminal elements of the unit under test. The allocation of the individual bits of the test vector or of the test information to the individual terminal elements of the unit under test can be freely set.

Claims22

Dependent claims

An apparatus for fast generation of large quantities of test data words for use in a test facility for electronic assemblies having a plurality of terminals connected to respective terminal elements of the test facility, said apparatus allocating test data to the assembly terminals via the facility terminals bit-by-bit for a plurality of test steps, and comprising:

a test data generator for generating at least one test data vector for each test step dependent on a test program;
and
a test data converter connnected to said test data generator and to said facility terminals for selecting test data words at least from said test data vector and for variably allocating the bits of said test data words to said facility terminals.

A method for operating an apparatus for generating large quantities of test data words for use in a test facility controlled by computer generating test instructions and allocation instructions in accord with a test program for testing electronic assemblies having a plurality of terminals connectible to respective terminals of a plurality of test elements of said facility, said method comprising the steps of:

reading a test instruction from an instruction memory in the form of an instruction word having an operation code;
transferring the instruction word read from said instruction memory to an instruction register;
reading a test data vector from an operand memory in accord with the operation code in said instruction word;
transferring said test data vector upon the occurrence of an allocation instruction from said operand memory to an allocator in accord with an address in said allocation instruction;
generating allocation information from an allocation memory in accord with an allocation information address in said allocation instruction;
connecting said test data vector using said allocator to a data part of a status memory bit-by-bit in accord with said allocation information;
and
generating a test data word from said status memory having an address part identifying a group of facility terminals to be selected and a test element to be selected.

5 more elements

Dependencies are inferred from the claim text.

Apparatus for fast generation of large quantities of test data words in a test facility

Life of this patent

Apparatus for fast generation of large quantities of test data words in a test facility

Life of this patent

Abstract

Claims22