Method and apparatus for controlling access to an asynchronous communication network

A method for digital information communication whereby at least one of a plurality of information processing elements is coupled to at least one other of the plurality of information processing elements, comprising the steps of:

• interfacing each of the plurality of information processing elements to a plurality of coupling means connected to at least one communication circuit;
• initiating communication circuit acquisition means included in communication controller means in response to a control signal produced by a processor included in the communication controller means when access to the communication circuit is needed for communication of digital information from the one information processing element to the other;
• releasing the processor to perform other data processing functions;
• monitoring the communication circuit by means of the communication circuit acquisition means;
• detecting the availability of the communication circuit by means of the communication circuit acquisition means;
• acquiring the communication circuit under control of the communication circuit acquisition means for transmission of digital information over the communication circuit;
• maintaining availability of the communication circuit under control of the communication circuit acquisition means for transmission of digital information over the communication circuit;
• interrupting the processor upon acquisition of the communication circuit in response to an interrupt signal produced by the communication circuit acquisition means;
• and
• initiating transmission of digital information over the communication circuit acquired by the communication circuit acquisition means in response to the interrupt signal under control of the processor.

Apparatus for digital information communication whereby at least one of a plurality of information processing elements is coupled to at least one other of the plurality of information processing elements, comprising:

• means for interfacing each of the plurality of information processing elements to a plurality of coupling means connected to a communication circuit;
• means for interfacing each of a plurality of communication controller means associated with the plurality of coupling means to the communication circuit;
• a processor included in the communication controller means for producing a control signal when access to the communication circuit is needed for communication of digital information from the one information processing element to another;
• and
• communication circuit acquisition means included in the communication controller means responsive to the control signal for acquiring the communication circuit, the communication circuit acquisition means maintaining availability of the communication circuit for transmission of digital information over the communication circuit, thereby releasing the processor to perform other data processing functions;
• the processor initiating transmission of digital information over the communication circuit acquired by the communication circuit acquisition means.

Apparatus for digital information communication whereby at least one of a plurality of information processng elements is coupled to at least one other of the plurality of information processing elements, comprising:

• means for interfacing each of the plurality of information processing elements to a plurality of coupling means connected to a communication circuit;
• means for interfacing each of a plurality of communication controller means associated with the plurality of coupling means to the communication circuit;
• a processor included in the communication controller means for producing a control signal when access to the communication circuit is needed for communication of digital information from the one information processing element to another;
• communication circuit acquisition means included in the communication controller means responsive to the control signal for acquiring the communication circuit, the communication circuit acquisition means maintaining availability of the communication circuit for transmission of digital information over the communication circuit, thereby releasing the processor to perform other data processing functions;
• the communication circuit producing an interrupt signal when the communication circuit is acquired by the communication circuit acquisition means;
• and
• the processor being responsive to the interrupt signal for initiating transmission of digital information over the communication circuit acquired by the communication circuit acquisition means.

A digital information communication network whereby at least one of a plurality of information processing elements is loosely coupled to at least one other of the plurality of information processing elements, comprising:

• a plurality m of four-wire, full duplex communication channels;
• a plurality n of personality module circuits connected to the plurality of information processing elements and a preselected subset of the m communication channels for interfacing the plurality of information processing elements to the preselected subset of the m communication channels in order to exchange digital information in the form of data among the n personality module circuits, each one of the n personality module circuits including a first serial interface comprising:
• (a) a first direct memory access interface in series with
• (b) a first serial interface circuit in series with
• (c) a first multiplexer circuit;
• the first serial interface for connecting the associated personality module circuit to the preselected subset of the m communication channels;
• and
• a plurality n of system module circuits connected to the m communication channels and the n personality module circuits for exchanging digital information in the form of messages among the n system module circuits, at least certain of the messages exchanged among the n system module circuits being for control of the exchange of data among the n personality module circuits, each one of the n system module circuits including at least a second serial interface comprising:
• (a) a second direct memory access interface in series with
• (b) a second serial interface circuit in series with
• (c) a second multiplexer circuit including acquire logic circuitry for acquiring one of the m communication channels;
• the second serial interface for connecting the associated system module circuit to the m communication channels;
• the data and messages being exchanged among the n personality module circuits and n system module circuits, respectively, in bit-serial format;
• thereby providing high throughput fault tolerant digital information communication in serial format.