Monolithic integrated circuit having common external terminal for analog and digital signals and digital system using the same
AssigneeHitachi, Ltd.
InventorShirou Baba
Life of this patent
Estimating the term…
Abstract
Herein disclosed is a digital semiconductor integrated circuit which is equipped with: a digital signal input circuit; an analog signal input circuit made receptive of an analog signal for feeing out a digital signal corresponding to said analog signal; and a common external terminal connected commonly with the input terminals of said digital signal input circuit and said analog signal input circuit. By the preparation with the use of a suitable switch circuit, the aforementioned common external terminal can be used as either an analog signal input terminal or a digital signal input terminal. As a result, the number of the external output terminals required for the aforementioned semiconductor integrated circuit can be reduced.
Claims26
A microprocessor having a register, an internal bus, an arithmetic and logic unit, a plurality of external terminals and a control circuit, said microprocessor comprising:
- a digital signal input circuit having at least one digital signal input node coupled to one or more of said plurality of external terminals and at least one output node;
- an analog signal input circuit having at least one analog signal input node and at least one output node coupled to said internal bus;
- first switching means for transmitting to said analog signal input node an analog signal from at least one of said external terminals coupled to said digital signal input circuit;
- and
- second switching means for selectively coupling said output node of said digital signal input circuit to said internal bus.
In a digital control system having a controllable device having its operation controlled by digital control signals and a microprocessor receptive of both an analog signal and a digital signal for generating said digital control signals, the improvement comprising:
- a microprocessor having a register, an internal bus, an arithmetic and logic unit, a control circuit and a plurality of external terminals;
- a digital signal input circuit having at least one digital signal input node coupled to one or more of said plurality of external terminals and at least one output node;
- an analog signal input circuit having at least one analog signal input node coupled to one or more of said plurality of external terminals and at least one output node;
- at least one of said external terminals being coupled commonly with the analog signal input node of said analog signal input circuit and the digital signal input node of said digital signal input circuit;
- first switching means for coupling the output node of said digital signal input circuit to said internal bus;
- second switching means for coupling the output node of said analog signal input circuit to said internal bus;
- and
- wherein each of said first and second switching means does not couple output nodes of said digital and said analog signal input circuits to said internal bus at the same time.
In a microprocessor having a register, an internal bus, an arithmetic and logic unit, a control circuit and a plurality of external terminals, said microprocessor comprising:
- a digital signal input circuit having at least one digital signal input node coupled to one or more of said plurality of external terminals and at least one output node;
- an analog signal input circuit having at least one analog signal input node coupled to one or more of said plurality of external terminals and at least one output node;
- at least one of said external terminals being coupled commonly with the analog signal input node of said analog signal input circuit and the digital signal input node of said digital signal input circuit;
- first switching means for coupling the output node of said digital signal input circuit to said internal bus;
- second switching means for coupling the output node of said analog signal input circuit to said internal bus;
- and
- wherein each of said first and second switching means does not couple output nodes of said digital and said analog signal input circuits to said internal bus at the same time.
In a microprocessor having a register, an internal bus, an arithmetic and logic unit, a control unit and a plurality of external terminals, said microprocessor comprising:
- a digital signal input output circuit having at least one digital signal input output node coupled to one or more of said plurality of external terminals and at least one output node;
- an analog signal input circuit having at least one analog signal input node coupled to one or more of said plurality of external terminals and at least one output node;
- at least one of said external terminals being coupled commonly with the analog signal input node of said analog signal input circuit and the digital signal input output node of said digital signal input output circuit;
- first switching means for coupling the output node of said digital signal input output circuit to said internal bus;
- second switching means for coupling the output node of said analog signal input circuit to said internal bus;
- and
- wherein each of said first and second switching means does not couple output nodes of said digital signal input output circuit and said analog signal input circuits to said internal bus at the same time.
In a digital control system having a controllable device having its operation controlled by digital control signals;
- and a microprocessor receptive of both an analog signal and a digital signal for generating said digital control signals, the improvement comprising:
- a microprocessor having a register, an internal bus, an arithmetic and logic unit, a control circuit and a plurality of external terminals;
- a digital signal input output circuit having at least one digital signal input output node coupled to one or more of said plurality of external terminals and at least one output node;
- an analog signal input circuit having at least one analog signal input node coupled to one or more of said plurality of external terminals and at least one output node;
- at least one of said external terminals being coupled commonly with the analog signal input node of said analog signal input circuit and the digital signal input output node of said digital signal input output circuit;
- first switching means for coupling the output node of said digital signal input output circuit to said internal bus;
- second switching means for coupling the output node of said analog signal input circuit to said internal bus;
- and
- wherein each of said first and second switching means does not couple output nodes of said digital signal input output circuit and said analog signal input circuits to said internal bus at the same time.
A microprocessor having a register, an internal bus, an arithmetic and logic unit, a plurality of external terminals and control means, said microprocessor comprising:
- a digital signal input circuit having at least one digital signal input node coupled to one or more of said plurality of external terminals;
- an analog signal input circuit having at least one analog signal input node coupled to one or more of said plurality of external terminals;
- at least one of said external terminals being coupled in common to said analog and said digital signal input circuits;
- said digital signal input circuit having first switching means for selectively coupling said digital signal input node to said internal bus;
- said analog signal input circuit having second switching means for selectively coupling said analog signal input node to said internal bus;
- and
- the switching states of said first and second switching means being controlled by said control means.
In a digital control system having a controllable device having its operation controlled by digital control signals and a microprocessor receptive of both an analog signal and a digital signal for generating said digital control signals, the improvement comprising:
- a microprocessor having a register, an internal bus, an arithmetic and logic unit, control means and a plurality of external terminals;
- a digital signal input circuit having at least one digital signal node coupled to one or more of said plurality of external terminals;
- an analog signal input circuit having at least one analog signal input node coupled to one or more of said plurality of external terminals;
- at least one of said external terminals being coupled in common to said analog and said digital signal input circuits;
- said digital signal input circuit has first switching means for selectively coupling said digital signal input node to said internal bus;
- said analog signal input circuit has second switching means for selectively coupling said analog signal input node to said internal bus;
- and
- the switching states of said first and second switching means being controlled by said control means.
Dependencies are inferred from the claim text.