Circuit for calculating the value of a complex digital variable

A digital circuit arrangement for calculating the value of a complex digital quantity x+iy of two digital values x and y as an approximation to within 4% of the actual value, comprising:

• a first absolute value circuit receiving a first digital value x;
• a second absolute value circuit receiving a second digital value y;
• a first adder having a first input coupled to the output of said first absolute value circuit and a second input coupled to the output of said second absolute value circuit;
• a first subtracter having a first input coupled to said first absolute value circuit output and a second input coupled to said second absolute value circuit output;
• a third absolute value circuit having its input coupled to the output of said first subtracter;
• a second adder having first and second inputs;
• a first constant multiplier coupling the output of said first adder to said second adder first input;
• and
• a second constant multiplier coupling the output of said third absolute value circuit to said second adder second input,
• whereby the output of said second adder will provide a zeroth approximation of said value if a predetermined first constant multiplication factor is entered into said first constant multiplier and a predetermined second constant multiplication factor is entered into said second constant multiplier.