PLL frequency synthesizer
AssigneeNEC Corporation
InventorsTatsuru Kojima, Yukio Fukumura
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AssigneeNEC Corporation
InventorsTatsuru Kojima, Yukio Fukumura
Estimating the term…
A phase locked loop frequency synthesizer comprises a voltage-controlled oscillator (VCO) for generating a signal having a frequency which varies in response to a control voltage. A variable frequency divider divides the output frequency of the VCO in a ratio which is determined by a control signal. A reference oscillator supplies a reference signal having a predetermined frequency. A fixed frequency divider divides the frequency of the reference signal in a fixed ratio. A phase comparator compares the phases of the outputs of the fixed frequency divider and variable frequency divider to provide a control pulse corresponding to a phase difference between these outputs. A charge pump has a power supply terminal for generating a charge/discharge voltage in response to the control pulse. A loop filter includes a first capacitor which is supplied with the charge/discharge voltage for supplying a control voltage to the VCO which corresponds to the charge/discharge voltage. A power supply circuit generates a D.C. voltage by boosting the voltage of the output of the fixed frequency divider and by supplying this boosted voltage to the charge pump. The invention finds its greatest use in a portable radio receiver.
A PLL frequency synthesizer comprising:
A PLL frequency synthesizer comprising:
A method for use in a PLL frequency synthesizer, for controlling the oscillation frequency of a VCO, comprising the following steps of:
A method for use in a PLL frequency synthesizer, for controlling the oscillation frequency of a VCO, comprising the following steps of:
Dependencies are inferred from the claim text.