MOS logic input circuit having compensation for fluctuations in the supply voltage

A MOS logic circuit comprising a series circuit including at least first, second, and third MOS transistors connected between first and second power source terminals, wherein

• said second and third MOS transistors have the same conductivity type, which is different from that of said first MOS transistor,
• a gate of said first MOS transistor and a gate of at least one of said second and third MOS transistors receive an input signal,
• a gate of the other of said second and third MOS transistors, serving as a correcting MOS transistor, is connected to said first power source terminal,
• a series connecting point of said first and second MOS transistors serves as an output node of said logic circuit, and
• an absolute value of a gate threshold level voltage of said first MOS transistor is significantly different from that of said correcting MOS transistor.

A MOS logic circuit comprising a series circuit including at least first, second, and third MOS transistors connected between first and second power source terminals, wherein

• said second and third MOS transistors have the same conductivity type, which is different from that of said first MOS transistor,
• a gate of said first MOS transistor and a gate of at least one of said second and third MOS transistors receive an input signal,
• a gate of the other of said second and third MOS transistors, serving as a correcting MOS transistor, is connected to said first power source terminal,
• a series connecting point of said first and second MOS transistors serves as an output node of said logic circuit, and
• a channel size ratio and an absolute value of a gate threshold voltage of said first MOS transistor are significantly different from those of said correcting MOS transistor.