Microprocessor controlled signal discrimination circuitry

Circuitry for the validation of repetitive signals received by the circuitry including:

• input/output circuitry having a plurality of signal inputs for receiving signals, said input/output circuitry providing information as to when and which of said signal inputs receives a signal and is controlled by a microprocessor for establishing when and at which of said signal inputs a signal can be received;
• programmable microprocessor connected to said input/output circuitry;
• a random access memory connectd to said input/output circuitry and said programmable microprocessor;
• a read only memory connected to said programmable microprocessor for storing instructions for said programmable microprocessor;
• said programmable microprocessor programmed for operating with said input/output circuitry and said random access memory for controlling said input/output circuitry for permitting any of said signal inputs to receive a signal and when a signal is received at one of said signal inputs providing a "lock-out" time interval during which none of said signal inputs can receive a signal and upon completion of said lock-out time interval establishing a "window" time interval during which a signal can be received only at said one of said signal inputs, said "lock-out" and "window" time intervals being provided each time a signal is received at said one of said signal inputs permitting any of said signal inputs to receive a signal in the event a signal is not received during a "window" time interval, a signal received to establish said one of said signal inputs being considered valid by said programmable microprocessor when a predetermined number of signals are received at said one of said inputs before a "window" interval is provided during which a signal is not received at said one of said inputs.