Methods and means for testing faults in a liquid crystal display system

A circuit arrangement for a liquid crystal display having a first transparent substrate overlying a second transparent substrate in spaced relation, a plurality of segment electrodes and at least one back electrode arranged, respectively, on opposing inner surfaces of said first and second substrates, and a plurality of separate controllable display contacts connected, respectively, to said segment electrodes and said back electrode, said circuit arrangement comprises:

• means for generating separate operating signals for said segment electrodes and said back electrodes, said separate operating signals causing a relatively steady display of said segment electrodes;
• means for applying said separate operating signals through supply lines to said segment electrodes and said back electrode;
• means for generating checking signals for said segment electrodes and said back electrode, said checking signals being capable of causing said segment electrodes to visibly blink;
• and
• means for applying said checking signals through respective impedance paths to said segment electrodes and said back electrode so that said checking signals are in superposition with said operating signals, said operating signals being different from said checking signals and said impedance paths each having an impedance which is substantially larger than that of said supply lines, whereby when there is no malfunction in said supply lines, said operating signals override said checking signals and the segment electrodes and the back electrode are effectively driven by said operating signals, while when there is a malfunction in said supply lines either blocking or substantially limiting said operating signals, said segment electrodes and said back electrode are driven by said checking signals thereby causing said segment electrodes to visibly blink.