Linear CMOS transconductance element
AssigneeRegents of the University of Minnesota
InventorFrancisco J. Fernandez
Life of this patent
Estimating the term…
Abstract
A simple CMOS linear, tunable, high-frequency transconductance element is described. By using a pair of composite n-channel/p-channel devices, the transconductance circuit achieves its linearity by current differencing without undue matching requirements. The circuit configurations use current differencing to cancel the square-law nonlinearities of the field effect transistors and require approximate matching between transistors of the same type.
Claims25
A linear voltage to current transducer, comprising:
- a first composite transistor including a first n-type field effect transistor having gate, drain and source terminals, and a first p-type field effect transistor having gate, drain and source terminals, and having the source terminal of said first n-type transistor connected to the source terminal of said first p-type transistor;
- a second composite transistor including a second n-type field effect transistor having gate, drain and source terminals, and a second p-type field effect transistor having gate, drain and source terminals, and having the source terminal of said second n-type transistor connected to the source terminal of said second p-type transistor;
- said second n-type transistor being matched to said first n-type transistor and said second p-type transistor being matched to said first p-type transistor;
- at least one signal input means connected to at least one of the gate terminals of at least one of said composite transistors for controlling the current through said composite transistors;
- variable biasing means connected to at least one of the gate terminals of at least one of said composite transistors for biasing all of said n-type and p-type transistors in constant saturation and for adjusting the transconductance;
- and
- current differencing means connected between said first composite transistor and said second composite transistor for generating a current output in proportion to the difference between the currents flowing through said first and second composite transistors in linear response to large-signal voltages applied to said at least one signal input means.
A linear voltage to current transducer, comprising:
- a first composite transistor including a first n-type field effect transistor having gate, drain and source terminals, and a first p-type field effect transistor having gate, drain and source terminals, and having the source terminal of said first n-type transistor connected to the source terminal of said first p-type transistor;
- a second composite transistor including a second n-type field effect transistor having gate, drain and source terminals, and a second p-type field effect transistor having gate, drain and source terminals, and having the source terminal of said second n-type transistor connected to the source terminal of said second p-type transistor;
- said second n-type transistor being matched to said first n-type transistor and said second p-type transistor being matched to said first p-type transistor;
- signal input connected to one of the gate terminals of said first composite transistor and further connected to one of the gate terminals of said second composite transistor;
- first tuning voltage means connected to the other one of said gate terminals of said first composite transistor and second tuning voltage means connected to the other one of said gate terminals of said second composite transistor for receiving tune voltages and for biasing all of said n-type and p-type transistors in constant saturation in response thereto;
- and
- current differencing means connected to one of the drain terminals of said first composite transistor and further connected to one of the drain terminals of said second composite transistor for generating a current output in proportion to the difference between the current flowing through said first and said second composite transistors in linear response to a large-signal voltage applied to said signal input.
A linear voltage to current transducer, comprising:
- a first composite transistor including a first n-type field effect transistor having gate, drain and source terminals,and a first p-type field effect transistor having gate, drain and source terminals, and having the source terminal of said first n-type transistor connected to the source terminal of said first p-type transistor;
- a second composite transistor including a second n-type field effect transistor having gate, drain and source terminals, and a second p-type field effect transistor having gate, drain and source terminals and having the source terminal of said second n-type transistor connected to the source terminal of said second p-type transistor;
- said second n-type transistor being matched to said first n-type transistor and said second p-type transistor being matched to said first p-type transistor;
- first signal input connected to one of the gate terminals of said first composite transistor;
- second signal input connected to one of the gate terminals of said second composite transistor;
- tuning voltage means connected to the other one of said gate terminals of said first composite transistor and further connected to the other one of said gate terminals of said second composite transistor for receiving tune voltages and for biasing said n-type and p-type transistors into constant saturation in response thereto;
- and
- current differencing means connected to one of the drain terminals of said first composite transistor, and further connected to one of the drain terminals of said second composite transistor for generating a current output in proportion to the difference between the currents flowing through said first and said second composite transistors in linear response to large-signal voltages applied to said first and second signal inputs.
A linear voltage to current transducer, comprising:
- a first composite transistor including a first n-type field effect transistor having gate, drain and source terminals, and a first p-type field effect transistor having gate, drain and source terminals and having the source terminal of said first n-type transistor connected to the source terminal of said first p-type transistor;
- a second composite transistor including a second n-type field effect transistor having gate, drain and source terminals, and a seacond p-type field effect transistor having gate, drain and source terminals and having the source terminal of said second n-type transistor connected to the source terminal of said second p-type transistor;
- said second n-type transistor being matched to said first n-type transistor and being second p-type transistor being matched to said first p-type transistor;
- first signal input connected to one of the gate terminals of said first composite transistor and further connected to one of the gate terminals of said second composite transistor;
- second signal input connected to the other one of said gate terminals of said first composite transistor and further connected to the other one of the gate terminals of said second composite transistor;
- means for biasing all of said n-type and p-type transistors in saturation mode;
- and
- current differencing means connected to one of the drain terminals of said first composite transistor and further connected to one of the drain terminals of said second composite transistor for generating a current output in proportion to the difference between currents flowing through said first and second composite transistors in linear response and proportion to large-signal voltages applied to said signal inputs.
Dependencies are inferred from the claim text.