Test method and apparatus for cellular array processor chip
AssigneeITT Corporation
InventorSteven G. Morton
Life of this patent
Estimating the term…
Abstract
A cellular array processor chip includes a common bus communicating with the individual cells thereof. The common bus can be monitored during chip testing to detect the presence, or absence, of a defective cell. Each cell can be inactivated with respect to the common bus. During testing if the presence of a defective cell is determined to exist each cell is individually tested until a defective cell is located. That cell is inactivated and the chip testing is resumed until all defective cells are located and inactivated.
Claims9
A cellular array processor chip comprising:
- a plurality of processor cells;
- means associated with said chip, for simultaneously monitoring a plurality of said processor cells during chip testing, said means including a common bus, said common bus communicating with all of said plurality of processor cells whereby the signal on said common bus is indicative of the presence or absence of a defective cell among said plurality of processor cells on said chip.
A method of testing a cellular array processor chip having a plurality of processor cells, said method comprising the steps of:
- initializing all of said plurality of said cells, said cells being connected to a common bus;
- and
- monitoring said common bus whereby if any of said plurality of cells is defective the signal on said common bus indicates same.
Dependencies are inferred from the claim text.