Period detecting circuit
AssigneeCoco Research Inc.
InventorYasufumi Yamagata
Life of this patent
Estimating the term…
Abstract
A period detecting circuit to identify the stop mode of a subject apparatus whose speed is measured by an input pulse, having a first memory for storing a value corresponding to the period of the pulse to be measured and second memory for storing therein a value which results from multiplying the preceding value stored in the first memory by a predetermined number. The contents stored in both memories are compared with each other to produce a stop mode detecting signal as its compared output.
Claims1
A period detecting circuit to which is supplied a pulse train to be measured and producing an output corresponding to its period comprising;
- (a) multi-vibrating means receiving an input pulse train containing said pulse to be measured and generating an output pulse train having pulses delayed from the pulses of said input pulse train;
- (b) a function generator means controlled by said delayed pulse for generating a variable signal corresponding to the period of a pulse of said input pulse train;
- (c) first memory means for storing said variable signal from said function generator;
- (d) multiplying means for multiplying said variable signal by a predetermined set value greater than one with respect to time;
- (e) second memory means for storing the output from said multiplying means;
- and
- (f) comparing means for comparing outputs from said first and second means and for producing a stop mode detection output when the stored value in said first memory means becomes lower than the stored value in said second memory means.
Dependencies are inferred from the claim text.