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US 4,733,104 AGranted
Integrated circuit for controlling power converter by frequency modulation and pulse width modulation
AssigneeGeneral Electric Company
InventorsRobert L. Steigerwald, Keku M. Mistry
Life of this patent
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Abstract
An integrated circuit contains the gate drivers and the control components for constructing a DC power supply in any of the most popular converter topologies. Multi-function elements in the control circuit minimize the area of the chip. The integrated circuit drives both the upper and lower switches of a half-bridge converter and separately regulates two power supply output voltages, one by pulse width modulation and the other by frequency modulation.
Claims5
An integrated circuit comprising:
- voltage-controlled oscillator means for providing a variable frequency VCO signal in response to an external input signal;
- a first flip-flop having an input and a pair of complementary outputs, said flip-flop input being connected to the output of said voltage-controlled oscillator means;
- a first two-input AND gate for providing a turn-on pulse and having one input connected to one of said flip-flop outputs;
- a second two-input AND gate for providing a turn-on pulse and having one input connected to the other of said flip-flop outputs;
- amplifier means for receiving an input signal and providing an output signal,
- a first comparator having one input coupled to the output of said amplifier means and having its other input coupled to the output of said voltage-controlled oscillator means, the output of said first comparator being coupled to the remaining inputs of said first and second AND gates;
- a third AND gate having an input responsive to an enable signal;
- a fourth AND gate having an input responsive to said enable signal;
- a first dead-time circuit coupling the output of said first AND gate to an input of said third AND gate, said first dead-time circuit delaying the beginning of each turn-on pulse from said first AND gate by a first predetermined dead-time;
- a second dead-time circuit coupling the output of said second AND gate to an input of said fourth AND gate, said second dead-time circuit delaying the beginning of each turn-on pulse from said second AND gate by a second predetermined dead-time;
- and
- a driver circuit connected to the outputs of said third and fourth AND gates, said driver circuit having outputs adapted to drive a pair of series-connected converter switches, said driver circuit adapted to be coupled to an external capacitor for providing a voltage sufficient to drive the upper one of said converter switches.
9 more elements
Dependencies are inferred from the claim text.