Process for producing undercut dummy gate mask profiles for MESFETs

A process for fabricating undercut mask profiles for use in the fabricating of a fully self-aligned field effect transistor which includes a gate and source and drain elements formed in a semiconductor substrate having a current channel disposed therebetween comprising the steps of:

• depositing a first layer of nitride on the surface of said substrate in a plasma enhanced chemical vapor deposition reactor at a first plasma excitation frequency to impart a given etch rate to said first layer,
• depositing a second layer of nitride on said first layer at a second plasma excitation frequency to impart an etch rate lower than said given etch rate to said second layer,
• patterning said first and second layers such that at least one vertical edge of each of said layers is exposed, and
• etching said first and second layers at said at least one vertical edge to remove portions of said first layer at a rate higher than the rate at which portions of said second layer are removed and provide an undercut mask structure having a T-shaped cross section.