Digital signal gain control circuitry for varying digital signals in substantially equal db steps
AssigneeRCA Corporation
InventorTodd J. Christopher
Life of this patent
Estimating the term…
Abstract
A volume control or amplitude varying system for digital signals includes a cascade connection of a coarse multiplier/divider for changing the values of digital signals in 6 db steps and a fine multiplier/divider for changing the values of digital values logarithmically in substantially equal steps of less than 6 db per step. The coarse multiplier/divider selectively multiplies the digital signal by powers of 2. The fine multiplier/divider multiplies the digital signal by predetermined values, an ascending/descending sequence of which form a substantially logarithmic sequence. Both serial-bit and parallel-bit embodiments are described.
Claims17
A digital signal amplitude control system for changing the amplitude value of a digital signal in substantially uniform dB steps, which steps are less than 6 dB, said system comprising:
- a signal input terminal for applying said digital signal;
- coarse control means, having a signal input terminal and having control signal input terminals and an output terminal, including means for altering the amplitude value of digital signals in multiples, including one, of 6 dB steps responsive to first control signals applied to said control signal input terminals;
- fine control means, having a signal input terminal, an output terminal and control signal input terminals, including means for multiplying digital signals by a number of predetermined values responsive to second control signals applied to its control signal input terminals, wherein an ordered ascending/descending sequences of said predetermined values is substantially logarithmic;
- means for coupling said coarse control means and said fine control means in a serial combination with said signal input terminal;
- and
- control signal generating means, for generating said first and second control signals, wherein successive changes of said first and second control signals effect amplitude changes, in signal processed by said serial combination of coarse and fine control means, in substantially uniform increments of dB, which increments are less than 6 dB.
A digital signal amplitude control system for changing the amplitude value of a digital signal in substantially uniform dB steps, which steps are less than 6 dB, said system comprising:
- a signal input terminal for applying said digital signal;
- coarse control means, having a signal input terminal and having control signal input terminals and an output terminal, including means for altering the amplitude value of digital signals in multiples, including one, of 6 dB steps responsive to first control signals applied to said control signal input terminals;
- fine control means, having a signal input terminal, an output terminal and control signal input terminals, including means for multiplying digital signals by a predetermined number, P, of predetermined values responsive to second control signals applied to its control signal input terminals, P being an integer, and 20 times the logarithm (base 10) of the ratio of successive ones of an ordered ascending sequence of said predetermined values is a substantially equal to six divided by P;
- and
- means for coupling said coarse control means and said fine control means in a serial combination with said signal input terminal;
- control signal generating means, for generating said first and second control signals, wherein successive changes of said first and second control signals effect amplitude changes in signal processed by said serial combination in substantially uniform increments of dB, which increments are less than 6 dB.
A digital signal amplitude control system for changing the amplitude values of a serial-bit digital signal in substantially uniform dB steps, which steps are less than 6 dB and wherein said serial-bit digital signal occurs as PCM samples with LSB's occurring first in time, said system comprising:
- a signal input terminal for applying said serial-bit digital signal;
- a coarse multiplier/divider having signal input and output terminals, and having control input terminals for applying an N-state control signal (N being an integer), said coarse multiplier/divider responsive to said control signal for selectively delaying a serial-bit PCM signal by K sample bit periods, K being an integer from 0 to (N-1) inclusive;
- a fine multplier/divider having signal input and output terminals, and having control input terminals for applying an M-state control signal (M being an integer), including means responsive to said control signal for selectively combining signals applied to the signal input terminal of said fine multiplier/divider which are relatively delayed by integral sample bit periods to effect multiplication of serial-bit signals by predetermined values;
- means for connecting said fine and coarse multiplier/dividers in serial combination with said system signal input terminal;
- and
- control signal generating means, for generating said M-state and said N-state control signals wherein successive changes of said M-state and said N-state control signals effect amplitude changes in signal processed by said serial combination of said coarse and fine multiplier/divider in substantially uniform increments of dB, which increments are less than 6 dB.
Dependencies are inferred from the claim text.