Receiver of a digital communication apparatus
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorAki Nakamura
Life of this patent
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Abstract
A receiver for a digital communication apparatus which utilizes a time division multiplexed signal of a single or a plurality of pulse width modulation signal(s) and a synchronous signal or of a plurality of pulse width modulation signals, includes: a signal separation circuit including flip-flops and logic gates for separating each said pulse width modulation signal and said synchronous signal or separating each said pulse width modulation signal, from said time division multiplexed signal.
Claims4
A receiver for a digital communication apparatus utilizing a time-division multiplexed signal in which a plurality of pulse signals of different types are time-division multiplexed, comprising:
- signal separation means for separating said pulse signals into said different types, including,
- first flip-flop means, responsive to leading edges of said plurality of pulse signals, for producing a first output waveform,
- second flip-flop means, responsive to leading edges of a plurality of pulse signals of an inverted time-division multiplexed signal, for producing a second output waveform, and
- logic gate means, responsive to the output waveforms of said first and second flip-flop means, for producing output signals corresponding to each different type of pulse signal at respective output terminals thereof;
- and
- reset pulse generator means for providing reset pulses to said first and second flip-flop means, including means for producing said reset pulses at intervals corresponding to the period of said plurality of pulse signals, said reset pulses being produced between respective starting and falling edges of said plurality of pulse signals.
Dependencies are inferred from the claim text.