Autoranging time stamp circuit
AssigneeTektronix, Inc.
InventorJohn L. Easterday
Life of this patent
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AssigneeTektronix, Inc.
InventorJohn L. Easterday
Estimating the term…
A time stamp circuit comprises a plurality of counter programmable logic arrays for providing a Gray code count. Each count provided by the counters is associated as a time value with a specified event to be stored in memory. The count is generated automatically over a range of progressively slower frequencies provided by frequency dividing circuitry connected to an oscillator. The circuit has two modes of operation, a cumulative mode and a delta mode. In the cumulative mode, the count begins with the first occurrence of a specified event and ends when acquisition is halted. In the delta mode, a control programmable logic array automatically resets the Gray code count and thereby the clock frequency to its highest frequency each time a specified event is stored. The resolution, or time between counts, therefore is the same to begin between each pair of events.
A circuit for associating time values with specified events stored in a memory, comprising:
A circuit for associating time values with specified events stored in a memory, comprising:
In a data acquisition system that stores specified events in memory, a circuit for associating a time value with each specified event that is stored for measuring the time between the events, the circuit comprising:
A method of associating a time value with specified events, the events stored in memory, comprising:
Dependencies are inferred from the claim text.