Translation lookaside buffer control system in computer or virtual memory control scheme
AssigneeKabushiki Kaisha Toshiba
InventorKazutoshi Eguchi
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AssigneeKabushiki Kaisha Toshiba
InventorKazutoshi Eguchi
Estimating the term…
In a TLB control system of the invention, each TLB entry has a bit V' representing validity of the entry, a bit VN.sub.i (i=1, . . . , n; n is an integer of 1 or more) representing the validity of TLB entry corresponding to the next page, and address translation data. A first detecting means detects, for each memory access, if correct address translation data is stored in the entry, and if correct address translation data is stored in the TLB entry corresponding to the next page, in accordance with an object virtual address and predetermined fields of the bits V' and VN.sub.i, and the address translation data corresponding to the object virtual address. A second detecting means detects if a single memory access involves a page boundary. A replacing means replaces a corresponding entry of the TLB in accordance with detection results of the first and second detecting means. When the TLB entry is replaced by the replacing means, the bit V' of a replace object TLB entry is set unconditionally. The bit VN.sub.i of the TLB entry corresponding to a page immediately preceding the page indicated by the replace object TLB entry, is updated. The TLB entry corresponding to a page immediately succeeding the page indicated by the replace object TLB entry, is checked, and the bit VN.sub.i of the replace object TLB, is set in accordance with the checking result.
A translation lookaside buffer (TLB) control system in a computer of virtual memory control scheme, comprising:
A translation lookaside buffer (TLB) control system in a computer of virtual memory control scheme having a page table in which each page table entry has a field of a modify bit representing if a corresponding page is rewritten, and a field of a real page number, comprising:
A translation lookaside buffer (TLB) control system in a computer of virtual memory control scheme having a page table in which each page table entry has a field of a modify bit representing if a corrsponding page is rewritten, and a field of a real page number, comprising:
A translation lookaside buffer (TLB) control system in a computer of virtual memory control scheme, comprising:
A translation lookaside buffer (TLB) control system in a computer of virtual memory control scheme having a page table in which each page table entry has a field of a modify bit representing if a corresponding page is rewritten, and a field of a real page number, comprising:
A translation lookaside buffer (TLB) control system in a computer of virtual memory control scheme having a page table in which each page table entry has a field of a modify bit representing if a corresponding page is rewritten, and a field of a real page number, comprising:
Dependencies are inferred from the claim text.