Eviction control apparatus

A memory apparatus for use in a data processing system, the data processing system generating logical addresses for accessing the memory apparatus, comprising:

• a main store for storing system data including a plurality of main store locations addressed by system line addresses, the main store locations having a data field for storing a line of data identified by the corresponding system line address, a plurality of lines constituting a page and each page being identified by a subset of a system line address called a system page address;
• an intermediate store for storing a subset of the system data, connected to receive the logical addresses, including a plurality of intermediate store locations addressed in response to logical addresses, the intermediate store locations having a data field for storing a line of data and a tag field for storing a tag associating the line of data in the data field with a system line address, a subset of the logical address being a logical page address;
• a system address store for storing system page addresses of lines of data stored in the intermediate store, and connected to receive tags accessed from the intermediate store in response to logical addresses, including a plurality of system address store locations addressed in response to a tag, the system address store locations having at least one system address field for storing a system page address and a status field for storing control bits indicating the status of the at least one system address field as active, eviction pending or available;
• means, in communication with the main store and the intermediate store, for transferring a line of data from a main store location to a data field in an intermediate store location and for writing a tag in the tag field associating the line of data in the data field with its system line address;
• means, in communication with the intermediate store and the system address store and connected to receive the logical addresses, for assuring that the line of data in the intermediate store location addressed in response to a logical address is the line of data having the correct system address, including
• means for translating logical page addresses to system page addresses for supply to the system page address store,
• means, responsive to a translation in the means for translating and to control bits in the system address store locations, for selecting a system address field having an available status and transferring the system page address of the translation to the selected system address field, generating a pointer to the selected system address field and setting the status of the selected system address field to active, and
• a translation buffer for storing translation entries including a plurality of translation buffer locations addressed in response to translation buffer addresses, a translation buffer address being generated as a function of and in response to a logical address, the translation buffer locations having a logical address field for storing data identifying the translated logical page address for the translation entry and a pointer field for storing the pointer associating the translated logical page address with the system address field in the system address store storing the system page address for the translation entry;
• eviction means, in communication with the system address store, the intermediate store and the main store, for detecting system address fields having an eviction pending status and evicting lines of data associated with the detected system address fields from the intermediate store and, when eviction is complete for a given system address field, updating the control bits in the system address store location to change the status of the given system address field to available;
• and
• means, in communication with the system address store, for changing control bits in status fields of system address store locations indicating active status to indicate eviction pending status.