Transparent synchronization of multiple channel data
AssigneeCyclotomics, Inc.
InventorElwyn R. Berlekamp
Life of this patent
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Abstract
In a multi-channel apparatus, a first plurality of N channels support user data and associated error correction and a second plurality of channels each contain a unique p-bit symbol followed by N consecutive M-bit samples of each of the N data channels. The receiver or retriever apparatus regenerates a system clock from all channels and examines the respective bit streams to score each bit phase as a match or a non-match of the sample in the synch channel with each M bit sample of the respective N data streams, and for each such N channels a counter corresponding to the then current phase is incremented or decremented. Relative skew for the N channels is derived from the addresses of the first counter to overflow for each of the N channels.
Claims5
A multi-channel digital communication apparatus supporting a first plurality of N, where N is an integer, data streams each corresponding to a channel of said apparatus and at least one further channel for synchronization among said first plurality of data streams, synchronization inserter means for establishing on said synchronization channel at M.times.N, where M is an integer discrete intervals a unique p-bit where p is an integer pattern followed by an M-bit subsequence copied from a selected portion of each of said N data streams, receiver synchronization means comprising:
- (a) clock restoration means for establishing an identifiable sequence of discrete intervals for each N data streams and synchronization channels,
- (b) comparison means for comparing each M-bit subsequence with each M consecutive bits of an M.times.N bit interval of respective data streams of respective ones of said channels,
- (c) a first plurality counter means, each counter means corresponding to a respective one of said data channel, each counter means comprising M.times.N tally means, each tally means corresponding to an identifiable discrete time interval, said counter means responsive to said comparison means to increment respective tally means for each identity of M-bit subsequences detected by said comparison means and to decrement said respective tally means for each non-match of said M-bit subsequences detected by said comparison means, whereby after a plurality of p+(M.times.N) bit intervals the respective skew in each said N channels is determined from the relative offset of the tally means of maximum content of each said channel,
- (d) digital delay means associated with each of said N channels, each said digital delay means responsive to the corresponding skew value to delay said channel in accordance with said skew value, whereby said N channels are re-aligned to exhibit synchrony.
The method of establishing synchronization among a plurality N+s where N and s are integers information streams comprising N data streams and s synchronization streams, said information streams extant on N+s respective communication channels, comprising the steps of:
- (a) associating s said channels for synchrony information and N said channels for data excluding synchrony information,
- (b) writing each of said N information streams to respective ones of said N channels,
- (c) writing to each of said s channels a unique p-bit pattern, then copying to each said of s channels an M-bit where p and M are integers subportion of the M.times.N bit portion of said respective data stream, whereby each of said s channels contain at least one synchronous information period comprising p+(Mk), where k is an integer bits,
- (d) recovering from the aggregate of said N+s channels identifiable consecutive discrete time intervals,
- (e) associating with each of said identifiable discrete time interval a counter to record the detection or non-detection of a condition consistent with one particular identifiable discrete time interval,
- (f) extracting from each of said s channels the plurality of N M-bit subsequences, and comparing each said M-bit subsequence with the respective data stream from which said M-bit subsequence was originally derived in step (c) and incrementing or decrementing respective ones of said counters in accord with the comparison step resulting in a determination of identity or non-identity of said extracted M-bit sequence with the data stream from which said M-bit sequence was copied, each one of said counters being associated with a respective current bit time,
- (g) changing said counters in consecutive order in response to said master clock,
- (h) detecting the overflow condition first to occur for each of the N sets of said counters, and associating a skew value to each of said N channels from the position of respective overflowed ones of said counters, and
- (i) delaying each of said N data streams by an amount consistent with the corresponding skew value.
Dependencies are inferred from the claim text.