Equalizer circuit for use in communication unit
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorKazuo Saito
Life of this patent
Estimating the term…
Abstract
A variable group delay equalizer comprises a delay portion and an amplitude correcting portion. In the delay portion, a group delay frequency response of an input signal is controlled. In the amplitude correcting portion, an amplitude distortion of the input signal caused in a delay portion can be corrected. A variable group delay equalizer with a wider variable range can be obtained by combining a fixed group delay equalizer.
Claims25
A variable group delay equalizer comprising:
- a signal inputting means;
- a delay means receiving an input signal from said signal inputting means for controlling a group delay frequency response characteristic of the input signal and for providing a controlled signal, the controlled signal from said delay means having an amplitude distortion which is caused during the control thereof;
- and
- an amplitude correcting means receiving said controlled signal from said delay means for correcting said amplitude distortion included therein, said amplitude correcting means including correcting means for varying an amplitude of said controlled signal in an opposite sense to amplitude variation included in said amplitude distortion caused by said delay means,
- wherein said amplitude correcting means is further operable for providing a flat characteristic to the group delay equalizer and free of any amplitude distortion by said delay means.
A switching type of equalizer capable of selecting one of a predetermined characteristic and a flat characteristic, comprising:
- a distributor for distributing a received signal;
- a main signal path connected to said distributor for transmitting a main signal;
- a subsignal path connected to said distributor for transmitting at least one pair of subsignals, said one pair of subsignals being of time leading and time delay of predetermined time period with respect to said main signal, respectively;
- an adder for synthesizing said main signal and said subsignals;
- and
- interrupting means for interrupting said subsignal path,
- said interrupting means including
- switched means for selecting between said predetermined characteristic and said flat characteristic by selectively switching said subsignal in and out of connection between said distributor and said adder.
A switching type of equalizer capable of selecting one of a predetermined characteristic and a flat characteristic, comprising:
- a distributor for distributing a received signal;
- a main signal path connected to said distributor for transmitting a main signal;
- a subsignal path connected to said distributor for transmitting at least one pair of subsignals, said one pair of subsignals being of time leading and time delay of predetermined time period with respect to said main signal, respectively;
- an adder means for combining said main signal and said subsignals;
- and
- interrupting means for providing said flat or predetermined characteristic by interrupting only said subsignal path, including disconnect means for disconnecting said subsignal path from said adder means while maintaining said main signal path without interruption or variation of the main signal path to the adder means.
Dependencies are inferred from the claim text.