Method and apparatus for implementing a maximum-likelihood decoder in a hypercube network
AssigneeCalifornia Institute of Technology
InventorFabrizio Pollara-Bozzola
Life of this patent
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Abstract
A method and a structure to implement maximum-likelihood decoding of convolutional codes on a network of microprocessors interconnected as an n-dimensional cube (hypercube). By proper reordering of states in the decoder, only communication between adjacent processors is required. Faster and more efficient operation is enabled, and decoding of large constraint length codes is feasible using standard VLSI technology.
Claims11
A method for maximum-likelihood decoding of convolutional codes for a received code sequence having 2.sup.m states (where m is a whole integer) by a plurality of interconnected processors each of which is normally in communication with all the other processors of said plurality and each provided with a decoding algorithm means for deriving/interchanging decoding parameters including branch metrics, accumulated metrics and survivors in an m-state trellis with each processor fixedly assigned to one state of said trellis, the improvement comprising:
- connecting each one of a plurality of 2.sup.m processors, equipped with said decoding algorithm means, in an n-cube configuration having bidirectional communication links along the edges only of said cube and certain processors thereof not having a direct communication link between other processors of said n-cube configuration;
- mapping an equivalent trellis for said n-cube configuration wherein processors represent more than one state and thus have direct communication links between other processors of said n-cube configuration on said equivalent trellis;
- and
- deriving/interchanging the branch and accumulated metrics between the processors which represent all of the states in said equivalent trellis in order to select, by said decoding algorithm means, the maximum likelihood path from said equivalent trellis.
A maximum likelihood decoding system for determining accumulated metrics and selecting survivor paths during a repetitive set of stages of a trellis code having a finite number of states M, (where M is a whole integer), said system comprising:
- N processors (N=2.sup.n) placed at the vertices of an n-dimensional cube, where n is a whole integer, with each processor assigned to represent more than one state at different stages, k, in a repeating set of stages in the trellis code --that is--each processor x is assigned state x according to the relation:
- x=.rho..sup.(k) (x),
- meaning that processor x represents state x at stage k, where .rho..sup.(k) (x) is the cyclic right shift of x by k binary position and k is number of the stages which make up a set in the trellis;
- means for comprising at each processor accumulated metrics and survivors at said different states of the trellis code at correspondingly different stages numbered (k=0, k=1, k=2, etc.) on the trellis;
- and
- bidirectional processor-communication links along the edges only of said n-dimensional cube for exchanging said computed accumulated metrics and survivors only between adjacent neighboring processors.
A maximum-likelihood decoding method for decoding sequences generated by a convolutional encoding having M=2.sup.m states by considering at the decoder all possible paths on an n-cube trellis and finding the most likely path according to a specified goodness criterion involving decoding parameters, said method comprising the steps of:
- forming a concurrent processor network of N=2.sup.n microprocessors interconnected as an n-dimensional cube having one microprocessor each at the vertices of said cube and bidirectional communication links for said microprocessors only along the edges of said cube and corresponding to all paths to be checked on said n-cube trellis by transmitting/receiving said decoding parameters over said communication links;
- broadcasting a sequence to be decoded to every one of said microprocessors;
- assigning each of the M states on said n-cube trellis to each of the N microprocessors according to the formula:
- x=.rho..sup.(k) (x)
- wherein, when expressed in binary notations, microprocessor x represents state x at stage k and the function .rho..sup.(k) is the cyclic right shift of x by k binary positions and M, m, N and n are whole integers;
- computing and storing locally at each microprocessor the decoding parameters;
- and
- transmitting/receiving said decoding parameters between neighboring processors in said n-dimensional cube.
A decoding method for determining the maximum-likelihood path of a trellis code having M=2.sup.n states representing a line sequence generated by a convolutional encoder and subjected to channel noise, said method involving known decoding algorithms having decoding parameters to be transmitted/received between N (N=2.sup.n) decoding processors, with M, N and n being whole integers comprising the steps of:
- dividing a decoding algorithm for said processors into equal parts as a power of two from all of said states for processing of each of said equal parts by one each of a plurality of N concurrent processors;
- locating N=2.sup.n processors at the vertices of an n-dimensional cube having bidirectional communication paths for said processors only along the edges of said cube;
- mapping a trellis with certain processors representing more than one state on the trellis in order to represent all of the M states on said trellis by said N processors, with each of said processors having direct transmitting/receiving paths from neighboring processors along the dimensions of said cube and in said trellis;
- and
- computing the maximum-likelihood path for each of the M states by each of the n microprocessors said trellis wherein said processors represent more than one state in an order according to:
- x=.rho..sup.(k) (x)
- wherein microprocessor x represents a set of states x at stages k and the function .rho..sup.(k) is the cyclic right shift of x by k binary positions.
A maximum likelihood decoding system for determining accumulated metrics and selecting survivor paths of M states of a trellis code in network of N=2.sup.n processors with each processor placed at the vertices of an n-dimensional cube and representing a set of S=2.sup.s states of the decoder formed from said processors;
- said decoder characterized in that:
- each processor represents different states of the trellis code at different stages on the trellis, according to the relation:
- x=.sup.(k) (x),
- meaning that processor x represents state x at state k, where .sup.(k) (x) is the cyclic right shift of x by k binary positions.
Dependencies are inferred from the claim text.