Non-volatile memory with predictable failure modes and method of data storage and retrieval

In a volatile memory comprising a data input, volatile storage means for storing Q and Q output signals, and Q and Q data outputs, wherein the improvement comprises:

• non-volatile memory means, comprising a FATMOS transistor and control circuitry coupled thereto, coupled to said volatile memory, for selectively storing a predetermined one of said Q and Q output signals, and for selectively transferring said stored signal to said volatile memory, said FATMOS transistor comprises drain, source and floating gate electrodes, said drain electrode being coupled to said volatile storage means, said source and floating gate electrodes being coupled to said control circuitry.

In a volatile memory comprising a data input, volatile storage means for storing Q and Q output signals, and Q and Q data outputs, wherein the improvement comprises:

• non-volatile memory means comprising a FATMOS transistor and control circuitry coupled thereto, for selectively storing a predetermined one of said Q and Q output signals, and for selectively transferring said stored signal to said volatile memory, said non-volatile memory means further comprising transistor means coupled to a voltage source and the drain electrode of said FATMOS transistor for selectively controlling the storage and transfer of signals between said non-volatile memory means and said volatile memory.

In a volatile memory comprising a data input, volatile storage means for storing Q and Q output signals, and Q and Q data outputs, wherein the improvement comprises:

• non-volatile memory means comprising a FATMOS transistor and control circuitry coupled thereto, for selectively storing a predetermined one of said Q and Q output signals, and for selectively transferring said stored signal to said volatile memory, said FATMOS transistor comprising drain, source and floating gate electrodes, said drain electrode being coupled to said data input, said source and floating gate electrodes being coupled to said control circuitry.

In a volatile memory comprising a data input, volatile storage means for storing Q and Q output signals, and Q and Q data outputs, wherein the improvement comprises:

• non-volatile memory means comprising a FATMOS transistor and control circuitry coupled thereto, for selectively storing a predetermined one of said Q and Q output signals, and for selectively transferring said stored signal to said volatile memory, said non-volatile memory means further comprising transistor means coupled to a voltage source and the drain electrode of said FATMOS transistor for selectively controlling the storage and transfer of signals between said non-volatile memory means and said volatile memory.