Back to results
US 4,730,268 AGranted
Distributed bus arbitration for a multiprocessor system
AssigneeTexas Instruments Incorporated
InventorJames S. Marin
Life of this patent
Estimating the term…
Abstract
A computer system has a plurality of processors sharing a bus. Bus arbitration circuitry is located on each processor for determining bus access. The identity of the processor which is responsible for arbitrating bus access changes from time to time. Each processor has a plurality of possible arbitration states, which are controllable through execution of software by the processor.
Claims8
A system for providing bus arbitration for at least two processors having a common clock signal, comprising:
- an asynchronous arbitration signal line connecting the processors into a ring;
- an asychronous cycle grant signal line connecting the processors into a ring;
- arbitration control means located in each processor and coupled to said arbitration signal line for determining which processor will control arbitration for bus access on a following clock cycle, wherein said control means includes
- means for selecting an arbitration state of said control means;
- means for storing a bit indicating whether the processor has arbitration mastership;
- and
- logic means coupled to said asynchronous signal line, to said arbitration state selecting means, and to said bit storing means, for determining whether the processor will take arbitration mastership during the next cycle;
- cycle grant control means in each processor and coupled to said cycle grant signal line for determining which processor will have bus access on the following clock cycle.
5 more elements
Dependencies are inferred from the claim text.