Semiconductor device having bipolar transistor and insulated gate field effect transistor with two potential power source

A semiconductor device comprising:

• a preceding circuit which delivers an output signal of first amplitude in correspondence with an input signal;
• a power source which has a first potential to be fed to said preceding circuit;
• a succeeding circuit which includes at least one bipolar transistor and at least one insulated-gate field effect transistor and to which the output signal of said preceding circuit is applied, said succeeding circuit delivering an output signal of second amplitude larger than the first amplitude in correspondence with the output signal of said preceding circuit and being supplied with a power voltage of second potential from a power source higher than the first potential;
• said preceding circuit being constructed of a first p-channel MOSFET and a first n-channel MOSFET, gate electrodes of both said MOSFETs being electrically connected to form an input node to which the input signal is applied;
• a source or drain electrode of said first p-channel MOSFET being connected to said power source which has the first potential;
• the drain or source electrode of said first p-channel MOSFET being connected to a source or drain electrode of said first n-channel MOSFET, to form an output node;
• the drain or source electrode of said first n-channel MOSFET being connected to a reference potential;
• said succeeding circuit including a second n-channel MOSFET, a third n-channel MOSFET, a switching means, a first bipolar transistor, and a signal inverter means;
• a gate electrode of said second n-channel MOSFET, an input electrode of said signal inverter means being electrically coupled to form an input node of said succeeding circuit to which the output signal of said preceding circuit is applied;
• a source or drain electrode of said second n-channel MOSFET being connected to a power source which has a third potential lower than the second potential;
• a collector electrode of said first bipolar transistor being electrically connected to the power source which has the second potential;
• the drain or source electrode of said second n-channel MOSFET, a source or drain electrode of said third n-channel MOSFET and a base electrode of said first bipolar transistor being electrically connected;
• the drain or source electrode of said third n-channel MOSFET being connected to the reference potential;
• a gate electrode of the third n-channel MOSFET, an output electrode of the signal inverter means and a first electrode of the switching means being electrically connected;
• and
• an emitter electrode of said first bipolar transistor and a second electrode of said switching means being electrically connected to form an output node which delivers the signal having the second amplitude;
• and
• a third electrode of said switching means being connected to the reference potential.

A semiconductor device comprising:

• a preceding circuit which delivers an output signal of first amplitude in correspondence with an input signal;
• a power source which has a first potential to be fed to said preceding circuit;
• a succeeding circuit which includes at least one bipolar transistor and at least one insulated-gate field effect transistor and to which the output signal of said preceding circuit is applied, said succeeding circuit delivering an output signal of second amplitude larger than the first amplitude in correspondence with the output signal of said preceding circuit and being supplied with a power voltage of second potential higher than the first potential from a power source;
• said preceding circuit being constructed of a first p-channel MOSFET and a first n-channel MOSFET, and gate electrodes of both said MOSFETs being electrically connected to form an input node to which the input signal is applied;
• a source or drain electrode of said first p-channel MOSFET being connected to said power source which has the first potential;
• the drain or source electrode of said first p-channel MOSFET being connected to a source or drain electrode of said first n-channel MOSFET, to form an output node;
• the drain or source electrode of said first n-channel MOSFET being connected to a reference potential;
• said succeeding circuit including a second p-channel MOSFET, a second n-channel MOSFET, a switching means and a first bipolar transistor;
• a gate electrode of said second p-channel MOSFET, a gate electrode of said second n-channel MOSFET and a first electrode of said switching means being electrically connected to form an input node of said succeeding circuit to which the output signal of said preceding circuit is applied;
• a source or drain electrode of said second p-channel MOSFET and a collector electrode of said first bipolar transistor being electrically connected to the power source which has the second potential;
• the drain or source electrode of said second p-channel MOSFET, a source or drain electrode of said second n-channel MOSFET and a base electrode of said first bipolar transistor being electrically connected;
• the drain or source electrode of said second n-channel MOSFET being connected to the reference potential;
• an emitter electrode of said first bipolar transistor and a second electrode of said switching means being electrically connected to form an output node which delivers the signal having the second amplitude;
• and
• the third electrode of said switching means being connected to the reference potential, and the second potential is increased when the output signal of the succeeding circuit is at a high voltage.