Fabrication method for modified planar semiconductor structures
AssigneeBell Communications Research, Inc.
InventorNader Tabatabaie
Life of this patent
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Abstract
A process for fabricating a semiconductor device or a semiconductor substrate having a first major surface on which active semiconductor devices are to be formed, and a second major surface. An etch stop layer is provided on the first major surface. A layer of semiconductor material is deposited on the etch stop layer and portions of the substrate are selectively removed to provide a pattern of apertures in the layer extending to the etch stop layer. Dopant species are provided through the second major surface to form active regions in the layer of semiconductor material.
Claims12
A process for fabricating a semiconductor device comprising the steps of:
- providing a semiconductor substrate having a first major surface on which active semiconductor devices are to be formed, and a second major surface;
- providing an epitaxially grown etch stop first layer on said first major surface;
- epitaxially depositing a second layer composed of semiconductor material on said etch stop layer;
- depositing a third layer composed of semiconductor material on said second layer of semiconductor material
- selectively removing portions of said semiconductor substrate to provide a pattern of apertures in said substrate extending to said etch stop layer;
- and
- providing a dopant species through said second surface to form active regions in said second layer of semiconductor material.
Dependencies are inferred from the claim text.