Field implant process for CMOS using germanium

A process for providing isolation structures between areas of different conductivity types in a complementary metal oxide semiconductor (CMOS) integrated circuit comprising the steps of:

• providing a semiconductor substrate having a surface containing areas of different types comprising p-conductivity areas and n-conductivity areas adjacent one another at interfaces;
• providing a mask over the substrate, where the mask exposes at least the interfaces or structures overlying the interfaces between the p-conductivity areas and the n-conductivity areas;
• providing germanium regions in the areas consisting of the p-conductivity areas, the n-conductivity areas or both;
• providing a second dopant in the germanium regions, where the second dopant provision is selected from a selective introduction of boron in the germanium region in the p-conductivity area, a selective introduction of phosphorus in the germanium region in the n-conductivity area, and a combination of the two;
• and
• forming field isolation structures at the interfaces between the p-conductivity areas and the n-conductivity areas, where channel stop regions containing at least one of the second dopants form beneath the field isolation structures.

A process for providing isolation structures between areas of different conductivity types in a complementary metal oxide semiconductor (CMOS) integrated circuit comprising the steps of:

• providing a semiconductor substrate having a surface containing areas of different types comprising p-conductivity areas and n-conductivity areas adjacent one another at interfaces;
• providing germanium/boron regions in one type of the areas in the substrate, and providing boron without germanium regions in the other type of areas in the substrate, where the germanium/boron regions and the boron without germanium regions are adjacent to the interfaces between the different conductivity areas;
• providing a mask over the substrate, where the mask exposes at least the interfaces or structures overlying the interfaces between the p-conductivity areas and the n-conductivity areas;
• and
• forming field isolation structures at the interfaces between the p-conductivity areas and the n-conductivity areas, where channel stop regions containing the second dopant form beneath the field isolation structures.

A process for providing isolation structures between areas of different conductivity types in a complementary metal oxide semiconductor (CMOS) integrated circuit comprising the steps of:

• providing a semiconductor substrate having a surface containing p-conductivity areas and n-conductivity areas adjacent one another at interfaces;
• introducing boron into the semiconductor substrate;
• introducing germanium into the semiconductor substrate, wherein one of the introductions is a blanket introduction and the other of the introductions is masked for only the p-conductivity areas by means of a first mask;
• removing the first mask;
• providing a second mask over the substrate, where the second mask exposes at least the interface or a region overlying the interface, between the p-conductivity areas and the n-conductivity areas;
• and
• forming a field isolation structure at the interface between the p-conductivity areas and the n-conductivity areas, where a region of combined boron doping is provided as a channel stop structure beneath the field isolation structure.

A process for providing isolation structures between areas of different conductivity types in a complementary metal oxide semiconductor (CMOS) integrated circuit comprising the steps of:

• providing a semiconductor substrate having a surface containing p-conductivity areas and n-conductivity areas adjacent one another at interfaces;
• introducing boron into both types of areas in an unmasked introduction step;
• providing a first mask over the n-conductivity areas;
• introducing germanium selectively into the p-conductivity areas;
• removing the first mask over the n-conductivity areas;
• providing a second mask over the substrate, where the second mask exposes at least the interface or structures overlying the interfaces between the p-conductivity areas and the n-conductivity areas;
• and
• forming field isolation structures at the interfaces between the p-conductivity areas and the n-conductivity areas, where regions of combined germanium and boron doping forms in the p-conductivity areas beneath the field isolation structures.

A process for providing isolation structures between areas of different conductivity types in a complementary metal oxide semiconductor (CMOS) integrated circuit comprising the steps of:

• providing a semiconductor substrate having a surface containing p-conductivity areas and n-conductivity areas adjacent one another at interfaces;
• providing a first mask over the n-conductivity areas;
• simultaneously introducing germanium and boron selectively into the p-conductivity areas;
• removing the first mask over the n-conductivity areas;
• providing a second mask over the substrate, where the second mask exposes at least the interface or structures overlying the interface, between the p-conductivity areas and the n-conductivity areas;
• and
• forming field isolation structures at the interfaces between the p-conductivity areas and the n-conductivity areas, where a region of combined germanium and boron doping forms in the p-conductivity areas as a channel stop beneath the field isolation structures.

A process for providing isolation structures between areas of different conductivity types in a complementary metal oxide semiconductor (CMOS) integrated circuit comprising the steps of:

• providing a semiconductor substrate having a surface containing p-conductivity areas and n-conductivity areas adjacent one another at interfaces;
• introducing boron into the semiconductor substrate;
• introducing germanium into the semiconductor substrate, wherein one of the introductions is a blanket introduction and the other of the introductions is masked for only the n-conductivity areas by means of a first mask;
• removing the first mask;
• providing a second mask over the substrate, where the second mask exposes at least the interface or a region overlying the interface, between the p-conductivity areas and the n-conductivity areas;
• and
• forming a field isolation structure at the interface between the p-conductivity areas and the n-conductivity areas, where a region of boron doping is provided as a channel stop structure beneath the field isolation structure.

A process for providing isolation structures between areas of different conductivity types in a complementary metal oxide semiconductor (CMOS) integrated circuit comprising the steps of:

• providing a semiconductor substrate having a surface containing p-conductivity areas and n-conductivity areas adjacent one another at interfaces;
• providing a first mask over the p-conductivity areas;
• introducing germanium selectively into the n-conductivity areas;
• removing the first mask over the p-conductivity areas;
• introducing boron into both types of areas in an unmasked introduction step;
• providing a second mask over the substrate, where the second mask exposes at least the interface or structures overlying the interfaces between the p-conductivity areas and the n-conductivity areas;
• and
• forming field isolation structures at the interfaces between the p-conductivity areas and the n-conductivity areas, where channel stop regions of boron doping forms in the p-conductivity areas beneath the field isolation structures.