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US 4,727,505 AGranted
Convolution arithmetic circuit for digital signal processing
AssigneeKabushiki Kaisha Toshiba
InventorsKazuo Konishi, Meisei Nishikawa
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Abstract
A convolution arithmetic circuit has a multiplier/accumulator to multiply two digital data sequences and add up the products. The sequences are stored in memories which cycle at the same rates and with different scales. One memory containing the multiplicand data is periodically updated, while the other memory containing coefficient data has a storage capacity of about twice the previous memory.
Claims8
A convolution arithmetic circuit comprising:
- first memory means for storing a first data sequence;
- second memory means for storing a second data sequence determined from an input signal;
- first counter means providing cycles of count data, each said cycle including a sequence of non-repeating counts;
- second counter means providing a series of addresses for said second memory;
- multiplying/accumulating means for computing a series of products by multiplying elements of said first data sequence read from said first memory means by elements of said second data sequence read from said second memory means and for determining the sum of said products;
- and
- means for transforming each said cycle of said count data into a series of addresses for said first memory means, each said series of addresses including a sequence wherein at least one address is generated twice.
4 more elements
A convolution arithmetic circuit comprising:
- first memory means for storing a first data sequence;
- second memory means for storing a second data sequence;
- third memory means for storing a third data sequence determined from an input signal;
- first counter means providing a series of first addresses for said first and second memory means;
- second counter means providing a series of second addresses for said third memory means;
- selection means for selectively supplying an output representing either said first or said second data sequence read from said first or second memory means in response to said first addresses;
- and
- multiplying/accumulating means for computing a series of products by multiplying elements of said third data sequence read from said third memory by said data sequence supplied by said selection means and for determining the sum of said products.
5 more elements
Dependencies are inferred from the claim text.