US 4,727,495 AGranted

Data communication system

AssigneeGeneral Electric Company

InventorsRobert Cheetham, Martin Roberts

Life of this patent

Estimating the term…

Loading patent…

Abstract

The 16 kbit/s HDLC formatted signalling channel for each of 256 ISDN subscribers is separated from the data channel(s) at the exchange line circuit and TMD multiplexed into a 4 Mbit/s stream provided to a common signalling handler. In the handler, a receiving element processes each new bit of the 4 Mbit/s stream with 47 bits read out of a channel parameter store by a channel number provided by a channel allocation store. The 47 bits include the previous 7 received bits and a message byte address for that channel. When those 7 bits and the new bit form a new deformatted message byte, that byte is written into an incoming message store at a location determined by the current channel number and message byte address. Using a FIFO buffer, messages are read from the incoming message store by a processor in the order in which they are completed.

Claims7

Dependent claims

A data communications system for handling a plurality of formatted data information channels each containing signalling information, the system comprising:

(A) a line circuit for each data information channel;
(B) means for multiplexing the plurality of formatted information channels received at the line circuits into a single time division multiplexed input data stream in which less than one frame of each formatted channel is present in each frame of the multiplexed stream;
and
(C) deformatting means including receiving and processing means for receiving successive bits of the multiplexed input data stream, processing the received bits successively, detecting when a complete message byte from an information channel has been received, and writing each detected message byte into an incoming message store for subsequent transmission,
(i) said receiving and processing means including input channel allocation means for providing an input channel number for each new received bit of the multiplexed input data stream, and an input channel parameter store which responds to each input channel number to provide to the receiving and processing means a set of channel parameters, the set of channel parameters being processed with the relevant new bits to detect if the new received bit completes a message byte for its originating channel, and to provide a new set of parameters for that channel which is written back into the channel parameter store, the set of channel parameters including information characterizing the circuit status of the input data stream with a single frame of that channel, a message byte address, and the previous n-1 bits received for that channel, each channel message byte having n bits.

2 more elements

Dependencies are inferred from the claim text.