Modular multiport data hub

A data hub for controlling data flow between a plurality of data source/destination units interconnected to the hub via control signal lines and via parallel address/data signal lines, the source/destination units having addressable memory locations, the data hub being responsive to at least one pair of address pointer input control signal words, to a word count input control signal word and to a channel enable input control signal word provided by a master source/destination unit, said input control signal words being indicative of one or more scheduled data signal word transfers to be effected by the hub from one or more memory locations within a data SOURCE/destination unit used as a channel source unit in a channel enabled in the data hub by the channel enable input control signal word, the one or more scheduled data transfers to be effected by the hub from the SOURCE/destination unit to one or more memory locations within an enabled channel data sorce/DESTINATION unit used as a destination unit, the first of the one or more channel source unit memory locations indicated by a source address pointer input control signal word and the remainder by a number of sequential increments or decrements of the source address pointer input control signal word equal to the word count, the first of one or more destination memory locations indicated by a data transfer destination address pointer input control signal word and the remainder by a number of sequential increments or decrements of the destination address pointer control signal word equal to the word count, the data hub comprising:

• storage means, for temporarily storing data transferred from the enabled channel data SOURCE/destination for later transfer to the enabled channel data source/DESTINATION;
• and
• control means, responsive to the source and destination address pointer input control signal words, to the word count and to the channel enable input control signal words, for providing a source data transfer request output signal to the enabled data SOURCE/destination unit and for subsequently receiving, in return, a source bus grant signal from the enabled data SOURCE/destination unit, said control means responsive to said source bus grant signal for providing said source address pointer input control signal word an an output signal to said enabled data SOURCE/destination unit, said storage means concurrently receiving and temporarily storing source data signal word from a memory location within the SOURCE/destination unit as indicated by said source address pointer output control signal word, said control means then providing a destination data transfer output request signal to the data source/DESTINATION unit and subsequently receiving, in return, a destination bus grant signal from the data source/DESTINATION unit, said control means responsive to said destination bus grant signal for providing said destination address pointer input control signal word as a destination address pointer output control signal word to said data source/DESTINATION unit and concurrently providing a transfer of said data signal word from said storage means to a memory location within said source/DESTINATION unit as indicated by said destination address pointer output control signal and, said control means incrementing or decrementing the source and destination address pointer output signals and decrementing the word count signal and cyclically repeating the transfer of data from the enabled channel's data SOURCE/destination unit to the data source/DESTINATION unit until the word count signal equals zero.