Method of manufacturing a semiconductor device
AssigneeKabushiki Kaisha Toshiba
InventorsTakashi Kimura, Toshihiro Kato
Life of this patent
Estimating the term…
Abstract
Disclosed is a method of manufacturing a semiconductor device which comprises the step of forming grooves in the form of a grid on the upper surface of a semiconductor wafer formed with elements, the step of grinding or polishing the underside of the semiconductor wafer to thereby reduce the thickness thereof, the step of applying a first single-sided, self-adhesive sheet onto the underside of the semiconductor wafer, and the step of stretching the second single-sided, self-adhesive sheet so as to space out each other a multiplicity of semiconductor chips divided along the gridlike grooves of the semiconductor wafer. Each semiconductor chip is picked up and mounted on a lead frame.
Claims4
A method of manufacturing a semiconductor device comprising forming grooves in the form of a grid in an upper surface of a semiconductor wafer formed with elements, applying a first single-sided self-adhesive sheet onto the upper surface of said semiconductor wafer formed with said grooves to reinforce said wafer, after forming said grooves and applying said first sheet grinding or polishing an underside of said semiconductor wafer to reduce the thickness thereof, applying a second single-sided selfadhesive sheet onto the underside of said semiconductor wafer and stretching said second
- single-sided self-adhesive sheet to space out from each other a multiplicity of semiconductor chips divided along the grooves of said semiconductor wafer.
Dependencies are inferred from the claim text.