Hybrid floating point/logarithmic number system arithmetic processor
AssigneeUniversity of Florida
InventorFred J. Taylor
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AssigneeUniversity of Florida
InventorFred J. Taylor
Estimating the term…
A hybrid arithmetic processor which combines attributes of conventional floating point (F.P) arithmetic with logarithmic number system (LNS) arithmetic. The arithmetic processor includes an input section (forward code converter) for converting input operands in F.P. format to intermediate operands in LNS format, an LNS arithmetic section for performing an arithmetic operation on the LNS intermediate operands and providing an intermediate output in LNS format, and an output section (inverse code converter) for converting the LNS intermediate output to an output in F.P. format. Significantly, output is provided in normalized floating point format but without the need for a time-consuming exponent alignment operation. Arithmetic operations, including addition and multiplication, are accomplished at a high speed, which speed moreover is constant and independent of the data. An efficient accumulator structure and the structure of an ultra-fast numeric processor are disclosed.
A processor for performing an arithmetic operation on a pair of input operands in floating point format each having an integer exponent part e and a mantissa part m to provide an output in floating point format having an integer exponent part e.sub.s and a mantissa part m.sub.s, said processor comprising:
A processor for performing an arithmetic operation on a pair of input operands in floating point format to provide an output in floating point format having an integer exponent part e.sub.s and a mantissa part m.sub.s, said processor comprising:
An accumulator for summing a series of input operands in floating point format each having an integer exponent e.sub.x and a mantissa part m.sub.x to provide an output in floating point format having an integer exponent part e.sub.s and a mantissa part m.sub.s, said accumulator comprising:
An accumulator for summing a series of input operands in floating point format to provide an output in floating point format having an integer exponent part e.sub.s and a mantissa part m.sub.s, said accumulator comprising:
A converter for converting a number expressed in floating point format to logarithmic number system format, said converter comprising:
A converter for converting a number expressed in logarithmic number system format to normalized floating point format, said converter comprising:
Dependencies are inferred from the claim text.