FET transconductance amplifier with improved linearity and gain
AssigneeTektronix, Inc.
InventorValdis E. Garuts
Life of this patent
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AssigneeTektronix, Inc.
InventorValdis E. Garuts
Estimating the term…
An FET high frequency analog amplifier circuit employs a feed-forward technique to provide a first order correction of amplifier distortion. In one embodiment, the amplifier is configured as a differential set of cascode FET stages. A linearization stage is connected across the output cascode transistors to provide a cancellation signal to reduce amplifier nonlinearities. The linearizing circuit includes a pair of field effect transistors in source-coupled arrangement with their respective bases driven by the drains of the differential amplifier input transistors. The gates are further driven by biasing current sources. The drains of the linearizing transistors are cross connected to the drains of the cascode output transistors, thereby injecting a compensating error signal into each differential output node and cancelling circuit nonlinearities. The amplifier is well suited for fabrication in integrated circuit form, especially using gallium arsenide technology.
A field effect transistor amplifier circuit of greater linearity and increased gain, comprising:
A field effect transistor amplifier circuit of greater linearity and increase gain, comprising:
Dependencies are inferred from the claim text.