Column redundancy for two port random access memory

A read/write memory system including a data storage matrix having columns and rows, write means responsive to column address signals for causing data bits to be stored in predetermined logical columns within data storage matrix, each column address defining a predetermined logical to physical relationship between the logical column defined by the column address and a physical column of the data storage matrix, said memory system having transfer means for transferring data bits between a plurality of physical columns of said data storage matrix and a data input/output means, said data bits being transferred in parallel to or from said data storage matrix and serially through said data input/output means in a sequence corresponding to the logical column order determined by said column address signals, the improvement comprising:

• a redundant data storage matrix having at least one column;
• a column redundancy means responsive to at least one predetermined column address signal for storing data bits in a column of the redundant data storage matrix;
• and for signalling that column redundancy has been selected;
• and
• control logic means, responsive to the column redundancy means and said transfer means, for causing data bits sequentially transferred through said data input/output means and having respective predetermined corresponding logical column positions to maintain their respective logical column positions during both reading and writing of data bits from and to said storage matrix when column redundany has been selected.