US 4,704,600 AGranted

Oversampling converter

AssigneeNippon Telegraph and Telephone Corporation

InventorsKuniharu Uchimura, Tsutomu Kobayashi, Atushi Iwata, Toshio Hayashi, Tadakatsu Kumura

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Abstract

An oversampling converter includes first and second integrators for integrating a difference between an input terminal voltage and feedback voltages, first and second quantizers for quantizing outputs from the first and second integrators, respectively, first and second feedback paths for feeding back as the feedback voltages outputs from the first quantizer to the input sides of the first and second integrators, a differentiator arranged at an output side of the second quantizer, an adder for adding an output from the differentiator and the output from the first quantizer, and a circuit for supplying an output from the first integrator to an input terminal of the second integrator. Two or more quantization loops may be used. When the oversampling converter is used as an A/D converter, A/D converters are arranged in the first and second feedback paths. When the oversampling converter is used as a D/A converter, D/A converters are arranged between the adder and the first quantizer and between the adder and the second quantizer.

Claims12

Dependent claims

An oversampling converter with sampling frequency sufficiently higher than an input signal frequency, comprising:

N quantization loops (N is an integer of not less than 2), each having an integrator for integrating a difference between an input terminal signal and a feedback signal, a quantizer for quantizing an output from said integrator, means for converting an output from said quantizer to the feedback signal, means for detecting a quantization error generated by said quantizer, and means for converting the output from said quantizer to a loop output signal;
a first quantization loop for producing a first loop output signal from the input terminal signal;
an nth quantization loop (n is an integer between 2 and N), having the same arrangement as said first quantization loop, for receiving at input terminals a quantization error from an (n-1)th quantization loop and for producing an nth output signal;
and
multiplying and adding means for adding the signal obtained by multiplying the nth loop output signal with a transfer function of a reciprocal number of a product of transfer functions of said integrators included in said first to (n-1)th quantization loop, to said first loop output signal, and for generating a sum signal, the sum signal appearing as an output signal.

2 more elements

Dependencies are inferred from the claim text.