Logic coincidence gate and logic sequential circuits using said coincidence gate
AssigneeThomson-CSF
InventorNgu T. Pham
Life of this patent
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Abstract
The invention relates to a coincidence gate, whose output only changes state if the inputs are of the same logic level. It has two parallel-connected NOT circuits, each constituted by a transistor, whose source is at earth and the drain supplied by a resistor, the gates constituting the inputs of the gate. The two resistors are identical saturated resistors and the first NOT circuit is supplied from a fixed voltage, whereas the second NOT circuit is supplied across a Schottky diode connected in the forward direction from the point common to the first saturated resistor and to the drain of the first transistor. The point common to the Schottky diode and the second saturated resistor constitutes the output of the coincidence gate. Application to sequential logic circuits.
Claims9
A logic coincidence gate comprising:
- two first and second transistors, where both sources are grounded and where the gates of said first and second transistors constitute the inputs of said logic gate and where the drains of each of said first and second transistors are connected to first and second resistors, wherein said first and second resistors are identical saturated resistors and wherein the first saturated resistor and said first transistor are supplied from a fixed voltage source, and further where the second saturated resistor and said second transistor are supplied across a Schottky diode, connected in a conductive sense, from the common point of the first saturated resitor and the drain of the first transistor, the common point of the Schottky diode and the second saturated resistor constituting the output of the logic coincidence gate.
A logic coincidence gate comprising:
- first and second transistors each having a source, a drain and a gate connection wherein both of said source connections are grounded;
- first and second identical saturation resistors each having a first and second end and each having their respective first ends coupled to the drain connections of each of said first and second transistors;
- a fixed voltage source coupled to said second end of said first saturated resistor and said first transistor for supplying a fixed voltage;
- a Schottky diode connected in a conductive manner from the common point of said first saturated resistor and said first transistor to said second end of said second saturated resistor and said second transistor;
- and
- wherein the gates of said transistors constitute the input of said logic gate and the output of said logic gate is constituted by the common point of said Schottky diode and said second saturated resistor.
Dependencies are inferred from the claim text.