Circuitry for calculating magnitude of vector sum from its orthogonal components in digital television receiver
AssigneeRCA Corporation
InventorDavid L. McNeely
Life of this patent
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AssigneeRCA Corporation
InventorDavid L. McNeely
Estimating the term…
An arrangement is provided for computing the magnitude value of the vector sum of two quadrature-related component signals I and Q with a minimal of hardware. To this end, the magnitude values of the orthogonal I and Q signals are applied to a ROM as address codes to produce the Log.sub.B .vertline.I.vertline. and Log.sub.B .vertline.Q.vertline. values to the logarithmic base B. The smaller of the Log.sub.B .vertline.I.vertline. and Log.sub.B .vertline.Q.vertline. logarithmic values is subtracted from the larger of the logarithmic values to produce the absolute value .vertline.D.vertline. of the difference between the respective logarithmic values. The difference value D is applied to a ROM as an address code which is programmed to generate a correction value F=0.5 Log.sub.B (1+B.sup.-2.vertline.D.vertline.). The correction value F is added to the larger of the two logarithmic values, and the antilog of the sum is computed to determine the magnitude value C of the vector sum of the two quadrature signals I and Q.
Apparatus for generating the magnitude value of the vector sum of a pair of quadrature-related component vectors comprising:
Apparatus for generating the magnitude value of the vector sum of a pair of quadrature-related component vectors comprising:
Dependencies are inferred from the claim text.