Redundancy enable/disable circuit
AssigneeAdvanced Micro Devices, Inc.
InventorsCheng-Wei Chen, Jieh-Ping Peng
Life of this patent
Estimating the term…
Abstract
A redundancy enable/disable circuit for enabling and disabling subsequently the use of redundant elements includes first through third P-channel MOS transistors, an N-channel MOS transistor, an enable fuse, and a disable fuse. The enable fuse is blown so as to enable the use of the redundant elements, and the disable fuse is blown subsequently to disable use of the redundant elements.
Claims14
A redundancy enable/disable circuit for enabling and disabling subsequently the use of redundant elements comprising:
- a first P-channel MOS transistor having its source connected to a supply potential;
- a second P-channel MOS transistor having its source connected to the drain of said first P-channel transistor, its gate connected to a first input terminal, and its drain connected to an output node;
- a third P-channel MOS transistor having its source connected to the supply potential, its gate connected to a ground potential, and its drain connected to the gate of said first P-channel transistor;
- an N-channel MOS transistor having its drain connected to the drain of said second P-channel transistor, its gate connected to the gate of said first P-channel transistor, and its source connected to the ground potential;
- enable fuse having a first end connected to the drain of said N-channel transistor and a second end connected to the ground potential;
- a disable fuse having a first end connected to the gate of said first P-channel transistor and a second end connected to a second input terminal;
- and
- said output node being in a low logic level when said enable and disable fuses are not blown or opened, said output node being enabled when said enable fuse is blown so as to permit use of redundant elements connectible to said output node, said output node being disabled when said disable fuse is subsequently blown so as to prevent use of the redundant elements.
A redundancy enable/disable circuit for enabling and disabling subsequently the use of redundant elements comprising:
- a first P-channel MOS transistor having its source connected to a supply potential and its drain connected to an output node;
- a second P-channel MOS transistor having its source connected to the supply potential, its gate connected to a ground potential, and its drain connected to the gate of said first P-channel transistor;
- an N-channel MOS transistor having its drain connected to the drain of said first P-channel transistor, its gate connected to the gate of said first P-channel transistor, and its source connected to the ground potential;
- an enable fuse having a first end connected to the drain of said N-channel transistor and a second end connected to the ground potential;
- a disable fuse having a first end connected to the gate of said first P-channel transistor and a second end connected to an input terminal;
- and
- said output node being in a low logic level when said enable and disable fuses are not blown or opened, said output node being enabled when said enable fuse is blown so as to permit use of redundant elements connectible to said output node, said output node being disabled when said disable fuse is subsequently blown so as to prevent use of the redundant elements.
Dependencies are inferred from the claim text.