Integrated circuit chip-and-substrate assembly
AssigneesAmerican Telephone and Telegraph Company, AT&T Bell Laboratories
InventorKing L. Tai
Life of this patent
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Abstract
In the interest of enhanced yield in the manufacture of "wafer-scale" integrated circuits an assembly of integrated circuit chips is made by placing chips on a substrate. Chips have beveled edges as produced by crystallographically anisotropic chemical etching, and the substrate has wells, grooves, or openings having sloping walls. Chips are positioned on the substrate by bringing sloping walls and beveled edges in juxtaposition, and circuitry on chips is connected to circuitry on the substrate.
Claims18
Device comprising a substrate and an integrated circuit chip,
- said circuit chip comprising means for connecting integrated circuitry on said chip with circuitry on said substrate,
- said substrate having a surface depression which has a sloping wall resulting from crystallographically anisotropic etching,
- said chip having a beveled edge matching said sloping wall and resulting from crystallographically anisotropic etching, and
- said edge and said slope being in juxtaposition, whereby said chip is positioned on said substrate.
Device comprising a substrate and a plurality of silicon integrated circuit chips physically attached to said substrate,
- said circuit chips comprising means for connecting integrated circuitry on said chip with circuitry on said substrate,
- said silicon circuit chips being electrically connected to lithographically defined circuitry on said substrate,
- said substrate consisting essentially of single-crystal silicon, and
- said electrical circuitry comprising a ground conductor and a power conductor and an integrated decoupling capacitor between said ground conductor and said power conductor.
Dependencies are inferred from the claim text.