Anti-corrosion treatment for patterning of metallic layers
AssigneeAdvanced Micro Devices, Inc.
InventorsKenneth J. Mockler, Richard C. Kittler, Glenn S. Warner, Howard F. Hsu
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Abstract
An improved method is provided for defining interconnect patterns in an integrated circuit fabricated on a semiconductor wafer. The improvement comprises the step of immersing the wafer in a weak base solution, prior to etching a titanium-tungsten barrier layer, so as to remove from the wafer chlorides and flourides remaining as a result of a previous step of etching a conductor layer. In a preferred embodiment of the invention, a step of immersing the wafer in a strong acid solution is also performed to remove chlorides from the wafer.
Claims18
An improved method for defining interconnect patterns in an integrated circuit fabricated on a semiconductor wafer, said method having a step of etching a conductor layer and a subsequent step of etching a titanium-tungsten barrier layer which lies between a silicon substrate and said conductor layer, the improvement comprising the step of:
- immersing said wafer in a strong acid solution which will not etch the conductor layer, prior to said subsequent step of etching the titanium-tungsten barrier layer, so as to remove chlorides from the wafer;
- and
- immersing the wafer in a weak base solution, so as to remove from the wafer chlorides and fluorides remaining as a result of said step of etching said conductor layer.
An improved method for defining interconnect patterns in an integrated circuit fabricated on a semiconductor wafer, said method having steps of forming a photoresist layer over a conductor layer, etching said conductor layer, and a subsequent step of etching a titanium-tungsten barrier layer which lies between a silicon substrate and said conductor layer, the improvement comprising the steps of:
- immersing said wafer in a strong acid solution which will not etch the conductor layer, so as to remove from the wafer and the photoresist layer chlorides remaining as a result of previously etching said conductor layer;
- immersing said wafer in a weak base solution so as to remove from the wafer remaining chlorides and fluorides;
- removing said photoresist layer from said etched conductor layer;
- and
- etching said titanium-tungsten barrier layer to complete the definition of said interconnect pattern.
An improved method for defining interconnect patterns in a semiconductor device fabricated on a semiconductor wafer, said semiconductor device having a silicon substrate, said method comprising the steps of:
- forming a titanium-tungsten barrier layer over said silicon substrate;
- forming a conductor layer over said titanium-tungsten barrier layer;
- forming a photoresist layer over said conductor layer;
- optically exposing said photoresist layer to define within said photoresist layer images of said interconnect patterns;
- developing said photoresist layer to expose a portion of said conductor layer;
- etching said exposed portion of said conductor layer to expose a portion of said titanium-tungsten barrier layer;
- plasma passivating said wafer to reduce the corrosion rate of said conductor layer in air;
- immersing said wafer in a strong acid solution which will not etch the conductor layer, so as to remove from the wafer and the photoresist layer chlorides remaining as a result of said etching of the conductor layer;
- immersing said wafer in a weak base solution so as to remove from the wafer remaining chlorides and fluorides;
- removing said photoresist layer from said etched conductor layer;
- and
- etching said exposed portion of said titanium-tungsten barrier layer.
Dependencies are inferred from the claim text.