Selective area double epitaxial process for fabricating silicon-on-insulator structures for use with MOS devices and integrated circuits

Abstract

A process is disclosed for preparing selectively doped and recrystallized silicon-on-insulator semiconductor wafers, and wafers prepared thereby, wherein successive amorphizing and annealing sequences are utilized to optimize the defect structure and doping of multiple regions or islands of the silicon on an insulator substrate. Prior to fabrication of the active devices, the various silicon islands are given customized ion implantation treatments to amorphize a silicon near-interface layer under differing sets of implantation conditions. The entire wafer is then annealed to achieve downward epitaxial recrystallization of the amorphized near-interface layers in all of the amorphized islands, growing on the near-surface crystalline layer of the silicon remote from the interface. The near-surface layers of the islands are then amorphized and annealed to achieve upward epitaxial recrystallization of the layers on the underlying silicon layer. By this approach, the crystalline defect structure and the dopant distributions of the islands are individually optimized for specific applications.

Dependencies are inferred from the claim text.