US 4,654,584 A · High-speed precision equivalent time sampling A/D converter and method

Abstract

A circuit for precisely measuring very high-speed recurring waveforms includes a comparator coupled between an analog input terminal and a successive approximation register. A digital-to-analog converter is also coupled between the digital output circuit of the successive approximation register and the second input terminal of the comparator, and a high-speed digital latch is coupled between the output of the comparator and the input of the successive approximation register for freezing the output states of the comparator upon the application of hold signals from a hold signal generator means, so that a first sequential series of hold signals are applied to the latch, coincident in time with the occurrence of a first portion of the recurring analog waveforms being measured, until the successive approximation register completes its measurement of the voltage amplitude of such first portion. A counter in the hold signal generator means is thereafter stepped, to enable the measurement of a second portion of the recurring waveform, adjacent the first portion, to be carried out by the application of a second series of hold signals, each coincident in time with the occurrence of the second portion of the waveform, until the voltage amplitude at the second portion is evaluated by the iterative operation of the successive approximation register. The counter is again stepped, and the process is repeated until numerous points upon the recurring waveform under examination are measured.

Claims14

Dependent claims

A circuit for precisely measuring high speed analog input signals that repeat during time periods under examination comprising:

successive approximation register means having an input and output circuit;
comparator means having an output circuit, a first input circuit for receiving said high-speed analog signals and a second input circuit;
a digital-to-analog converter means, coupled between the digital output circuit of said successive approximation register means and the second input circuit of said comparator and having a given settling time;
high-speed latch means coupled between the output circuit of said comparator and the input circuit of said successive approximation register means for freezing the output state of said comparator upon the application of a hold signal to the hold terminal of said latch means;
and
hold signal generator means for
(a) applying a first sequential series of hold signals to the hold terminal of said latch means, each being coincident in time with the occurrence of a first portion of said analog signals, until said successive approximation register means completes its measurement of the amplitude of said first portion, said hold signals being separated from each other for a time equal to or greater than the settling time of said converter;
(b) thereafter applying a second sequential series of hold signals to the hold terminal of said latch means, each being coincident in time with the occurrence of a second portion of said signals different from said first portion, until said successive approximation register means completes its measurement of the amplitude of said second portion, said hold signals being separated from each other for a time equal to or greater than the settling time of said converter, and so on until all desired portions of said analog signals are measured.

5 more elements

Dependencies are inferred from the claim text.

High-speed precision equivalent time sampling A/D converter and method

Life of this patent

High-speed precision equivalent time sampling A/D converter and method

Life of this patent

Abstract

Claims14