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US 4,646,126 AGranted
Semiconductor device
AssigneeKabushiki Kaisha Toshiba
InventorTetsuya Iizuka
Life of this patent
Estimating the term…
Abstract
Disclosed is a semiconductor device in which IC chips, tested and evaluated as good, are mounted on a silicon substrate, and interconnection wiring layers and pads for IC chips are provided on the substrate with an insulation film interposed therebetween.
Claims10
A semiconductor device comprising:
- a semiconductor substrate;
- an IC chip mounted directly on a first region of said substrate;
- a first insulation film formed on said substrate, said first insulation film having one region thinner than any other region;
- an interconnection wiring layer serving as a power line formed on said one region of said first insulation film, said first insulation film and said interconnection wiring layer and said substrate forming a capacitor to serve as a filter for reducing noise coming from said power line;
- a second insulation film formed on said interconnection wiring layer;
- a conductive bonding layer for forming an electrical connection for said IC chip, said conductive bonding layer being formed on said second insulation film above said interconnection wiring layer;
- and
- means for connecting said IC chip and said conductive bonding layer.
5 more elements
A semiconductor device comprising:
- a semiconductor substrate;
- an IC chip mounted directly on a first region of said substrate;
- a first insulation film formed on said substrate, said first insulation film having one region thinner than any other region;
- an interconnection wiring layer, located in close proximity to said first region of said substrate wherein said IC chip is placed, said interconnection wiring layer serving as a power line formed on said one region of said first insulation film, said first insulation film and said interconnection wiring layer and said substrate forming a capacitor to serve as a filter for reducing noise coming from said power line;
- a second insulation film formed on said interconnection wiring layer;
- a conductive bonding layer for forming an electrical connection for said IC chip, said conductive bonding layer being formed on said second insulation film above said interconnection wiring layer;
- and
- means for connecting said IC chip and said conductive bonding layer.
5 more elements
Dependencies are inferred from the claim text.