DC level trip detector
AssigneeTexas Instruments Incorporated
InventorsLoic LeToumelin, Franck Tollon, Yves Leduc
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Abstract
The method includes generating a binary signal (S4A to S4D) which is time modulated. To do this, an alternating signal (S1) is compared with a known cyclical signal (S5) and a threshold signal. There is measured the durations between the transitions of the modulated signal by means of a high speed clock and by means of counting in the positive and negative directions of the clock pulses for one or more periods of the signal under examination. If, after counting, a residual value is found, one generates a binary signal representing the transition.
Claims19
Method for detecting a transition of the direct current component of an alternating signal, characterized in that it includes establishing a threshold value (S2) above which the transition is considered to be significant, in generating at least one known cyclical signal (S5, S5') the frequency of which being large with respect to the frequency of said alternating signal (S1), in time modulating a binary signal (S4) with the difference between the alternating signal (S1), the threshold signal (S2), and said cyclical signal (S5, S5'), in generating a high speed clock signal (S6), in accumulating the pulses of the clock signal (S6) in the positive direction for the first logic level of the modulated signal (S4), and in a negative direction for the second level of this signal, in sampling the result of this accumulation over at least one period (P) of said alternating signal, and in generating an output signal (6) having a given logical level if the accumulation produces a residual value at the end of the last sampling period.
An apparatus for detecting a transition of the direct current component of an alternating signal, characterized in that it includes a binary signal modulator (2) including at least an input terminal (1) for said alternating signal (S1) at least an input terminal for a threshold signal (S2), said modulator including means (13, 14, 14', 18) for establishing a comparison between said alternating signal (S1), said threshold signal (S2), and a known cyclical signal for modulating said binary signal with the result of the comparison, a high speed clock signal generator and a sampling and up-down counter circuit (5) for respectively measuring, positively and negatively, the durations between the transitions of the modulated binary signal (S4) and for generating an output signal, in the presence of a residual count, representing a transition of said direct current component after the expiration of at least one period of said alternating signal (S1).
Dependencies are inferred from the claim text.