PNPN integrated circuit protective device with integral resistor
AssigneeFujitsu Limited
InventorsMasayuki Kokado, Hidezi Sumi
Life of this patent
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Abstract
A semiconductor device comprises an internal circuit and an electrostatic destruction preventing circuit connected between a predetermined electrical potential point and a signal input terminal with respect to the internal circuit. The electrostatic destruction preventing circuit comprises a PNP-transistor having its emitter connected to the predetermined electrical potential point, an NPN-transistor having its emitter connected to said signal input terminal and said internal circuit, collector connected to the base of the PNP-transistor, and base connected to the collector of said PNP-transistor, and a resistor connected between the base of the PNP-transistor and the base of the NPN-transistor.
Claims4
A semiconductor device for receiving an input signal, comprising:
- a substrate, an internal circuit formed in the substrate and an electrostatic destruction preventing circuit formed in the substrate and connected between a predetermined electrical potential point which is operatively connected to receive a most negative power supply voltage, and having a signal input terminal which is operatively connected to receive the input signal for said internal circuit, wherein said electrostatic destruction preventing circuit comprises:
- a PNP-transistor having a collector region, a base region, and an emitter region connected to said predetermined electrical potential point;
- an NPN-transistor having an emitter region connected to said signal input terminal and to said internal circuit, a collector region connected to the base region of said PNP-transistor, and a base region connected to the collector region of said PNP-transistor;
- and
- resistor means comprising a portion of the collector region of said PNP-transistor, and the base region of said NPN-transistor.
Dependencies are inferred from the claim text.